5秒后页面跳转
捷配首页

Datasheet > 信号电路 > 其他模拟IC> XTR110KPG4
XTR110KPG4 PDF预览

XTR110KPG4

更新时间： 2024-01-03 02:52:20
品牌 Logo 应用领域
德州仪器 - TI 信号电路转换器模拟IC
页数 文件大小 规格书
19页 825K
描述
具有 10V 基准电压和可选输入/输出范围的电压电流转换器/变送器 | N | 16 | -40 to 85

阅读下载

获取价格

XTR110KPG4 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SOP, SOP16,.4Reach Compliance Code：unknown
风险等级：5.63模拟集成电路 - 其他类型：ANALOG CIRCUIT
JESD-30 代码：R-PDSO-G16JESD-609代码：e0
功能数量：1端子数量：16
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：24 V认证状态：Not Qualified
子类别：Other Analog ICs最大供电电流 (Isup)：4.5 mA
最大供电电压 (Vsup)：40 V最小供电电压 (Vsup)：13.5 V
标称供电电压 (Vsup)：24 V表面贴装：YES
技术：BIPOLAR温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIEDBase Number Matches：1

XTR110KPG4 数据手册

 浏览型号XTR110KPG4的Datasheet PDF文件第4页浏览型号XTR110KPG4的Datasheet PDF文件第5页浏览型号XTR110KPG4的Datasheet PDF文件第6页浏览型号XTR110KPG4的Datasheet PDF文件第8页浏览型号XTR110KPG4的Datasheet PDF文件第9页浏览型号XTR110KPG4的Datasheet PDF文件第10页 
If the supply voltage, +VCC, exceeds the gate-to-source  
breakdown voltage of QEXT, and the output connection  
(drain of QEXT) is broken, QEXT could fail. If the gate-to-  
source breakdown voltage is lower than +VCC, QEXT can be  
protected with a 12V zener diode connected from gate to  
source.  
+VCC  
16  
47nF  
1
13  
14  
TIP30B  
etc.  
XTR110  
Two PNP discrete transistors (Darlington-connected) can be  
used for QEXT—see Figure 2. Note that an additional capaci-  
tor is required for stability. Integrated Darlington transistors  
are not recommended because their internal base-emitter  
resistors cause excessive error.  
0.047µF  
2
2N2907  
etc.  
IOUT  
RL  
Common  
TRANSISTOR DISSIPATION  
Maximum power dissipation of QEXT depends on the power  
supply voltage and full-scale output current. Assuming that  
the load resistance is low, the power dissipated by QEXT is:  
FIGURE 2. QEXT Using PNP Transistors.  
PMAX = (+VCC) IFS  
(2)  
+VCC  
16  
The transistor type and heat sinking must be chosen accord-  
ing to the maximum power dissipation to prevent overheat-  
ing. See Table II for general recommendations.  
VREF Force  
15  
VREF Sense  
12  
V
REF Adjust  
11  
VREF  
XTR110  
R
20kΩ  
(1)  
RS  
PACKAGE TYPE  
ALLOWABLE POWER DISSIPATION  
TO-92  
TO-237  
TO-39  
TO-220  
TO-3  
Lowest: Use minimum supply and at +25°C.  
Acceptable: Trade-off supply and temperature.  
Good: Adequate for majority of designs.  
Excellent: For prolonged maximum stress.  
Use if hermetic package is required.  
Adjust Range  
±5% Optimum  
Common  
2
NOTE: (1) RS gives higher resolution with reduced  
range, set RS = 0Ω for larger range.  
TABLE II. External Transistor Package Type and  
Dissipation.  
FIGURE 3. Optional Adjustment of Reference Voltage.  
INPUT VOLTAGE RANGE  
The internal op amp A1 can be damaged if its non-inverting  
input (an internal node) is pulled more than 0.5V below  
common (0V). This could occur if input pins 3, 4 or 5 were  
driven with an op amp whose output could swing negative  
under abnormal conditions. The voltage at the input of A1 is:  
Force  
15  
12  
QREF  
16  
2
+VCC  
Sense  
+10VREF  
XTR110  
(VREF IN  
)
(VIN1)  
4
(VIN2)  
2
VA1  
=
+
+
(3)  
16  
This voltage should not be allowed to go more negative than  
–0.5V. If necessary, a clamp diode can be connected from  
the negative-going input to common to clamp the input  
voltage.  
For 100mA with VCC up to  
40V use 2N3055 for QREF  
.
FIGURE 4. Increasing Reference Current Drive.  
COMMON (Ground)  
Careful attention should be directed toward proper con-  
nection of the common (grounds). All commons should  
be joined at one point as close to pin 2 of the XTR110 as  
possible. The exception is the IOUT return. It can be  
returned to any point where it will not modulate the  
common at pin 2.  
3 should be connected to this point. The circuit in Figure 3  
shows adjustment of the voltage reference.  
The current drive capability of the XTR110’s internal refer-  
ence is 10mA. This can be extended if desired by adding an  
external NPN transistor shown in Figure 4.  
OFFSET (ZERO) ADJUSTMENT  
VOLTAGE REFERENCE  
The offset current can be adjusted by using the potentiom-  
eter, R1, shown in Figure 5. Set the input voltage to zero and  
then adjust R1 to give 4mA at the output. For spans starting  
The reference voltage is accurately regulated at pin 12  
(VREF SENSE). To preserve accuracy, any load including pin  
XTR110  
SBOS141C  
7
www.ti.com  
1...45678910...19

下载PDF

与XTR110KPG4相关器件

型号 品牌 描述 获取价格 数据表
XTR110KU BB PRECISION VOLTAGE-TO-CURRENT CONVERTER/TRANSMITTER

获取价格
XTR110KU TI PRECISION VOLTAGE-TO-CURRENT CONVERTER/TRANSMITTER

获取价格
XTR110KU/1K BB Analog Circuit, 1 Func, PDSO16, GREEN, PLASTIC, SOIC-16

获取价格
XTR110KU/1K TI PRECISION VOLTAGE-TO-CURRENT CONVERTER/TRANSMITTER

获取价格
XTR110KU-BI BB Analog Circuit, 1 Func, BIPolar, PDSO16,

获取价格
XTR110L ETC LCC Precision Voltage-to-Current Converter/Transmitter

获取价格

与XTR110KPG4相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证