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XR16V698IQ PDF预览

XR16V698IQ

更新时间： 2024-02-22 14:03:42
品牌 Logo 应用领域
艾科嘉 - EXAR 通信时钟数据传输外围集成电路
页数 文件大小 规格书
58页 1084K
描述
Serial I/O Controller, 2 Channel(s), 1.875MBps, CMOS, PQFP100, 14 X 20 MM, 3 MM HEIGHT, PLASTIC, QFP-100

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XR16V698IQ 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QFP,Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.8
地址总线宽度：8边界扫描：NO
最大时钟频率：24 MHz通信协议：ASYNC, BIT
数据编码/解码方法：NRZ最大数据传输速率：1.875 MBps
外部数据总线宽度：8JESD-30 代码：R-PQFP-G100
长度：20 mm低功率模式：NO
湿度敏感等级：1串行 I/O 数：2
端子数量：100最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装形状：RECTANGULAR
封装形式：FLATPACK峰值回流温度（摄氏度）：225
认证状态：Not Qualified座面最大高度：3.4 mm
最大供电电压：3.6 V最小供电电压：2.25 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：14 mm
uPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIALBase Number Matches：1

XR16V698IQ 数据手册

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XR16V698  
2.25V TO 3.6V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO  
DECEMBER 2007  
REV. 1.0.1  
FEATURES  
GENERAL DESCRIPTION  
•
•
•
•
•
•
•
•
•
2.25V to 3.6V with 5V Tolerant Inputs  
1
The XR16V698 (698), is a 2.25V to 3.6V octal  
Universal Asynchronous Receiver and Transmitter  
(UART) with 5V tolerant inputs. The highly integrated  
device is designed for high bandwidth requirement in  
communication systems. The global interrupt source  
Single Interrupt output for all 8 UARTs  
A Global Interrupt Source Register for all 8 UARTs  
5G “Flat” UART Registers for easier programming  
Simultaneous Initialization of all UART channels  
General Purpose 16-bit Timer/counter  
register provides  
a
complete interrupt status  
indication for all 8 channels to speed up interrupt  
parsing. Each UART has its own 16C550 compatible  
set of configuration registers, TX and RX FIFOs of 32  
bytes, fully programmable transmit and receive FIFO  
trigger levels, automatic RTS/CTS or DTR/DSR  
hardware flow control with programmable hysteresis,  
automatic software (Xon/Xoff) flow control, RS-485  
half-duplex direction control with programmable turn-  
around delay, Intel or Motorola bus interface and  
sleep mode with a wake-up indicator.  
Sleep Mode with Wake-up Indication  
Highly Integrated Device for Space Saving  
Each UART is independently controlled with:  
■
■
■
■
■
■
■
16C550 Compatible 5G Register Set  
32-byte Transmit and Receive FIFOs  
Fractional Baud Rate Generator  
N
OTE: Covered by US patents #5,649,122 and #5,949,787  
Programmable TX and RX FIFO Trigger Level  
Automatic RTS/CTS or DTR/DSR Flow Control  
Automatic Xon/Xoff Software Flow Control  
APPLICATIONS  
•
•
•
•
•
•
Remote Access Servers  
RS-485 Half-Duplex Direction Control Output  
with Selectable Turn-around Delay  
Ethernet Network to Serial Ports  
Network Management  
■
■
Infrared (IrDA 1.0) Data Encoder/Decoder  
Programmable Data Rate with Prescaler  
Factory Automation and Process Control  
Point-of-Sale Systems  
•
•
Up to 15 Mbps Serial Data Rate  
Pin compatible to XR16V798. Same 100-pin QFP  
Package (14x20x3 mm)  
Multi-port RS-232/RS-422/RS-485 Cards  
F
IGURE 1. BLOCK DIAGRAM  
UART Channel 0  
32 Byte TX FIFO  
TX0, RX0, DTR0#,  
UART  
Regs  
IR  
DSR0#, RTS0#,  
CTS0#, CD0#, RI0#  
TX & RX  
ENDEC  
BRG  
32 Byte RX FIFO  
RST#  
A7:A0  
D7:D0  
IOR#  
IOW#  
CS#  
UART Channel 1  
UART Channel 2  
UART Channel 3  
UART Channel 4  
UART Channel 5  
Data Bus  
Interface  
Device  
Configuration  
Registers  
INT#  
16/68#  
UART Channel 6  
TX7, RX7, DTR7#,  
DSR7#, RTS7#,  
UART Channel 7  
16-bit  
Timer/Counter  
CTS7#, CD7#, RI7#  
XTAL1  
XTAL2  
TMRCK  
Crystal Osc/Buffer  
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com  
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