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XPC860DTZP50D3

更新时间： 2024-02-28 13:20:40

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
76页	805K
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Family Hardware Specifications

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XPC860DTZP50D3 数据手册

Hardware Speciﬁcation

MPC860EC/D

Rev. 6.1, 11/2002

MPC860 Family

Hardware Speciﬁcations

This document contains detailed information on power considerations, DC/AC

electrical characteristics, and AC timing speciﬁcations for the MPC860 family.

This document contains the following topics:

Topic

Page

Part I, “Overview”

Part II, “Features”

Part III, “Maximum Tolerated Ratings”

Part IV, “Thermal Characteristics”

Part V, “Power Dissipation”

Part VI, “DC Characteristics”

Part VII, “Thermal Calculation and Measurement”

Part VIII, “Layout Practices”

Part IX, “Bus Signal Timing”

Part X, “IEEE 1149.1 Electrical Speciﬁcations”

Part XI, “CPM Electrical Characteristics”

Part XII, “UTOPIA AC Electrical Speciﬁcations”

Part XIII, “FEC Electrical Characteristics”

Part XIV, “Mechanical Data and Ordering Information”

Part XV, “Document Revision History”

Part I Overview

The MPC860 Quad Integrated Communications Controller (PowerQUICC™)

is a versatile one-chip integrated microprocessor and peripheral combination

designed for a variety of controller applications. It particularly excels in both

communications and networking systems. The PowerQUICC unit is referred to

as the MPC860 in this manual.

The MPC860 is a derivative of Motorola’s MC68360 Quad Integrated

Communications Controller (QUICC^™), referred to here as the QUICC, that

implements the PowerPC architecture. The CPU on the MPC860 is a 32-bit

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