XM28C040PM-25

更新时间： 2024-01-10 23:55:54

品牌	Logo	应用领域
XICOR		存储
页数	文件大小	规格书
4页	28K
描述
High Density 5 Volt Byte Alterable Nonvolatile Memory Array

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数据手册

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XM28C040PM-25 数据手册

4 Megabit Puma Module

512K x 8 Bit

XM28C040P

High Density 5 Volt Byte Alterable Nonvolatile Memory Array

FEATURES

DESCRIPTION

• High Density Memory Module

—150ns, 200ns, and 250ns Access Times

Available

—4 Megabit Memory in 1 square inch.

• Flexible Multiplane Architecture

—Four Separate Chip Selects

—32 Separate I/Os

• User Conﬁgurable I/Os—x8, x16, or x32

• User Conﬁgurable Page Size—64 Double-

words, 128 Words, or 256 Bytes

—Concurrent Read/Write Operations

• Able to Continue Reading During a

Nonvolatile Write Cycle.

The XM28C040P is a high density CMOS byte alter-

able nonvolatile memory array constructed on a co-

ﬁred ceramic substrate using Xicor’s 128K x 8 compo-

nents in 32-pad leadless chip carriers. The Substrate is

a 66-pin ceramic pin grid array.

The module is conﬁgured with four separate chip

enable and write enable inputs and 32 separate I/Os.

This, along with the small footprint, provides the end

user with a large degree of ﬂexibility in board layout and

memory conﬁguration. In addition, with the large num-

ber of pins and the growth path being implemented, the

module will be able to grow to 16 megabits.

• 5 Volt Byte or Page Alterable

—No Erase Before Write

• Software Data Protection

• Early End of Write Polling

—DATA Polling

—Toggle Bit Polling

• High Reliability

—Endurance: 100,000 Cycles

—Data Retention: 100 Years

FUNCTIONAL DIAGRAM

OE WE1 CE1

WE2 CE2

WE3 CE3

WE4 CE4

128K x 8

A0-A16 I/O0-I/O7

I/O8-I/O15

I/O16-I/O23

I/O24-I/O31

Xicor, 1995, 1996 Patents Pending

7053 8/13/97 T0/C0/D0 SH

Characteristics subject to change without notice

12 3 4

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