Datasheet > XC6111H646ML-G

XC6111H646ML-G

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
特瑞仕 - TOREX		光电二极管
页数	文件大小	规格书
27页	411K
描述
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO5, SOT-25, 5 PIN

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XC6111H646ML-G 数据手册

XC6101 ~ XC6107, XC6111~ XC6117

Series

■ELECTRICAL CHARACTERISTICS

●XC6101~XC6107, XC6111~XC6117 Series

Ta = 25 ^OC

PARAMETER

Detect Voltage

SYMBOL

VDFL

CONDITIONS

MIN.

VDF(T)

× 0.98

VDF

TYP.

VDF(T)

VDF

MAX.

VDF(T)

× 1.02

VDF

UNITS CIRCUIT

①

VDFH

Hysteresis Width

XC6101~XC6107 ^(*1)

Hysteresis Width

VHYS

× 0.02 × 0.05 × 0.08

VDF

XC6111~XC6117 ^(*2)

× 0.001 x 0.01

VHYS

XC61X1/XC61X2/XC61X3

XC61X4/XC61X5 ^(*3)

(The MRB & the WD Pin:

No connection)

VIN=VDF(T)×0.9V

VIN=VDF(T)×1.1V

VIN=6.0V

Supply Current

ISS

VIN

μA

②

XC61X6/XC61X7 ^(*3)

(The MRB Pin:

VIN=VDF(T)×0.9V

VIN=VDF(T)×1.1V

VIN=6.0V

No connection)

0.5

6.0

Operating Voltage

1.0

0.15

①

③

VIN=1.0V

VIN=2.0V (VDFL(T)> 2.0V)

VIN=3.0V (VDFL(T) >3.0V)

VIN=4.0V (VDFL(T) >4.0V)

2.0

3.0

3.5

2.5

3.5

4.0

N-ch.

VDS = 0.5V

VDFL

Output Current

(RESETB)

IRBOUT

CMOS,

P-ch

VIN=6.0V

- 1.1

-0.8

④

③

VDS = 0.5V

N-ch

VIN=6.0V

4.4

4.9

VDS = 0.5V

VIN=1.0V

VIN=2.0V (VDFH(T)> 2.0V)

VIN=3.0V (VDFH(T)>3.0V)

VIN=4.0V (VDFH(T)>4.0V)

- 0.08

- 0.50

- 0.75

- 0.95

- 0.02

- 0.30

- 0.55

- 0.75

VDFH

Output Current

(RESET)

IROUT

P-ch.

VDS = 0.5V

④

①

Temperature

Coefficient

△VDF /

(△Ta・VDF)

-40^OC < Topr < 85 ^OC

+100

ppm/ ^OC

3.13

Time until VIN is increased from

1.0V to 2.0V

and attains to the release time level,

and the Reset output pin inverts.

Release Delay Time

(VDF<1.8V)

T_{D R}

⑤

100

200

400

125

250

500

150

300

1200

1600

3.13

2000

Time until VIN is increased from

1.0V to (VDFx1.1V)

and attains to the release time level,

and the Reset output pin inverts.

Release Delay Time

(VDF>1.9V)

T_{D R}

⑤

100

200

400

1600

125

250

500

2000

150

300

1200

Time until VIN is decreased from 6.0V to

1.0V and attains to the detect voltage

level, and the Reset output pin detects

while the WD pin left opened.

Detect Delay Time

T_{D F}

μs

VDFL/VDFH

CMOS Output

Leak Current

VDFL N-ch Open Drain

Output

VIN=6.0V, RESETB=6.0V (VDFL)

VIN=6.0V, RESET=0V (VDFH)

ILEAK

0.01

μA

③

VIN=6.0V, RESETB=6.0V

0.10

Leak Current

NOTE:

*1: XC6101~XC6107 (with hysteresis)

*2: XC6111~XC6117 (without hysteresis)

*3: ‘X’ represents both ‘0’ and ‘1’. (ex. XC61X1⇒XC6101 and XC6111)

*4: V^DF(T): Setting detect voltage

*5: If only “VDF” is indicated, it represents both VDFL (low when detected) and VDFH (high when detected).

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