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X9401YV24 PDF预览

X9401YV24

更新时间： 2024-09-26 07:24:47
品牌 Logo 应用领域
XICOR 光电二极管
页数 文件大小 规格书
21页 163K
描述
Digital Potentiometer, 4 Func, 2500ohm, 3-wire Serial Control Interface, 64 Positions, CMOS, PDSO24, PLASTIC, TSSOP-24

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X9401YV24 数据手册

 浏览型号X9401YV24的Datasheet PDF文件第2页浏览型号X9401YV24的Datasheet PDF文件第3页浏览型号X9401YV24的Datasheet PDF文件第4页浏览型号X9401YV24的Datasheet PDF文件第5页浏览型号X9401YV24的Datasheet PDF文件第6页浏览型号X9401YV24的Datasheet PDF文件第7页 
APPLICATION NOTES  
A V A I L A B L E  
AN99 • AN115 • AN120 • AN124 • AN133 • AN134  
Low Noise/Low Power/SPI Bus  
Preliminary Information  
X9401  
Quad, 64 Tap, Digitally Controlled Potentiometer (XDCP™)  
FEATURES  
DESCRIPTION  
• Quad–4 separate pots, 64 taps/pot  
• Nonvolatile storage of wiper position  
• Four Nonvolatile Data Registers for Each Pot  
• 16-bytes of EEPROM memory  
The X9401 integrates 4 digitally controlled potentiome-  
ters (XDCP) on a monolithic CMOS integrated  
microcircuit.  
The digitally controlled potentiometer is implemented  
using 64 resistive elements in a series array. Between  
each element are tap points connected to the wiper  
terminal through switches. The position of the wiper on  
the array is controlled by the user through the SPI bus  
interface. Each potentiometer has associated with it a  
volatile Wiper Counter Register (WCR) and 4 nonvola-  
tile Data Registers (DR0:DR3) that can be directly  
written to and read by the user. The contents of the  
WCR controls the position of the wiper on the resistor  
array through the switches. Power up recalls the con-  
tents of DR0 to the WCR.  
• SPI serial interface  
• R  
= 10kΩ  
Total  
• Wiper resistance = 150Ω typical  
• Standby current < 1µA (total package)  
• Operating current < 400µA max.  
• V  
= 2.7V to 5V  
CC  
• Packages–24-lead TSSOP, SOIC, CSP (Chip  
Scale Package)  
• 100 year data retention  
The XDCP can be used as a three-terminal potentiom-  
eter or as a two-terminal variable resistor in a wide  
variety of applications including control, parameter  
adjustments, and signal processing.  
BLOCK DIAGRAM  
Pot 0  
V
V
CC  
SS  
R0 R1  
R2 R3  
V
/R  
R0 R1  
R2 R3  
H0 H0  
Wiper  
Counter  
Register  
(WCR)  
Wiper  
Counter  
Register  
(WCR)  
V
/R  
H2 H2  
Resistor  
Array  
Pot 2  
V
/R  
L0 L0  
HOLD  
V
/R  
L2 L2  
CS  
SCK  
SO  
SI  
V
/R  
W0 W0  
V
/R  
W2 W2  
Interface  
and  
Control  
8
Circuitry  
A0  
A1  
V
/R  
W1 W1  
Data  
V
V
/R  
W3 W3  
WP  
R0 R1  
R2 R3  
R0 R1  
R2 R3  
V
/R  
Wiper  
Counter  
Register  
(WCR)  
H1 H1  
/R  
Resistor  
Array  
Pot 1  
Wiper  
Counter  
Register  
(WCR)  
H3 H3  
Resistor  
Array  
Pot 3  
V
/R  
L1 L1  
V
/R  
L3 L3  
Characteristics subject to change without notice. 1 of 21  
REV 1.9 4/13/04  
www.xicor.com  
1234567...21

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