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X45620V20I

更新时间: 2024-02-18 03:15:41
品牌 Logo 应用领域
英特矽尔 - INTERSIL 电池开关光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
20页 369K
描述
Dual Voltage Monitor with Integrated System Battery Switch and EEPROM

X45620V20I 技术参数

生命周期:Transferred包装说明:PLASTIC, TSSOP-20
Reach Compliance Code:unknown风险等级:5.69
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G20长度:7.01 mm
信道数量:2功能数量:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

X45620V20I 数据手册

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X45620  
®
Data Sheet  
July 29, 2005  
FN8250.0  
• 2.7V to 5.5V power supply operation  
• Available package — 20-lead TSSOP  
• Dual supervisor  
Dual Voltage Monitor with Integrated  
System Battery Switch and EEPROM  
• Battery switch and output  
FEATURES  
• Dual voltage monitoring  
• Active low reset outputs  
DESCRIPTION  
The Intersil X45620 combines power-on reset control,  
battery switch circuit, watchdog timer, supply voltage  
supervision, secondary voltage supervision, block lock  
protect and serial EEPROM in one package. This  
combination lowers system cost, reduces board space  
requirements, and increases reliability.  
• Two standard reset threshold voltages  
—Factory programmable threshold  
• Lowline Output — zero delayed POR  
• Reset signal valid to V = 1V  
CC  
• System battery switch-over circuitry  
• Selectable watchdog timer  
(0.15s, 0.4s, 0.8s, off)  
• 256Kbits of EEPROM  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2 or all of EEPROM array with  
Applying power to the device activates the power-on  
reset circuit which holds RESET active for a period of  
time. This allows the power supply and oscillator to  
stabilize before the processor can execute code.  
programmable Block Lock protection  
A system battery switch circuit compares V (V1MON)  
CC  
—In circuit programmable ROM mode  
• Minimize EEPROM programming time  
—64 byte page write mode  
with V  
input and connects V  
to whichever is  
BATT  
OUT  
higher. This provides voltage to external SRAM or other  
circuits in the event of main power failure. The X45620  
—Self-timed write cycle  
can drive 50mA from V and 250µA from V  
. The  
BATT  
CC  
—5ms write cycle time (typical)  
• 400kHz 2-wire Interface  
device switches to V  
when V  
drops below the  
BATT  
CC  
low V voltage threshold and V  
V
.
CC  
BATT > CC  
BLOCK DIAGRAM  
V
OUT  
V2FAIL  
WDO  
+
V2MON  
V
TRIP2  
V2 Monitor  
Logic  
-
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
Data  
Register  
Status  
SDA  
SCL  
Register  
Reset &  
Watchdog  
Timebase  
Command  
Decode, Test  
& Control  
Logic  
EEPROM  
Array  
BATT-ON  
512 X 512  
(32K X 8 Bit)  
Device  
Select  
Logic  
S0  
S1  
RESET/MR  
Power-on,  
Low Voltage  
Reset  
V
OUT  
V
+
CC  
LOWLINE  
V
(V1MON)  
TRIP1  
Generation  
V
CC  
Monitor  
-
Logic  
System  
V
Battery  
Switch  
OUT  
V
BATT  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  

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