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X4643S8Z-2.7A PDF预览

X4643S8Z-2.7A

更新时间： 2024-01-02 15:16:02
品牌 Logo 应用领域
瑞萨 - RENESAS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器双倍数据速率光电二极管内存集成电路
页数 文件大小 规格书
21页 329K
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X4643S8Z-2.7A

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X4643S8Z-2.7A 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：SOP, SOP8,.25Reach Compliance Code：unknown
风险等级：5.84I2C控制字节：10100DDR
JESD-30 代码：R-PDSO-G8内存密度：65536 bit
内存集成电路类型：EEPROM内存宽度：8
端子数量：8字数：8192 words
字数代码：8000最高工作温度：70 °C
最低工作温度：组织：8KX8
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE并行/串行：SERIAL
电源：3/5 V认证状态：Not Qualified
串行总线类型：I2C最大待机电流：0.000001 A
子类别：EEPROMs最大压摆率：0.003 mA
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
写保护：HARDWARE/SOFTWAREBase Number Matches：1

X4643S8Z-2.7A 数据手册

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X4643, X4645  
®
64K, 8K x 8 Bit  
Data Sheet  
March 29, 2005  
FN8123.0  
DESCRIPTION  
CPU Supervisor with 64K EEPROM  
The X4643/5 combines four popular functions, Power-  
on Reset Control, Watchdog Timer, Supply Voltage  
Supervision, and Serial EEPROM Memory in one pack-  
age. This combination lowers system cost, reduces  
board space requirements, and increases reliability.  
FEATURES  
• Selectable watchdog timer  
• Low V detection and reset assertion  
CC  
—Four standard reset threshold voltages  
—Adjust low V reset threshold voltage using  
CC  
Applying power to the device activates the power-on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
special programming sequence  
—Reset signal valid to V = 1V  
CC  
• Low power CMOS  
—<20µA max standby current, watchdog on  
—<1µA standby current, watchdog off  
—3mA active current  
• 64Kbits of EEPROM  
—64-byte page write mode  
—Self-timed write cycle  
—5ms write cycle time (typical)  
• Built-in inadvertent write protection  
—Power-up/power-down protection circuitry  
• 400kHz 2-wire interface  
• 2.7V to 5.5V power supply operation  
• Available packages  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable time  
out interval, the device activates the RESET/RESET  
signal. The user selects the interval from three preset  
values. Once selected, the interval does not change,  
even after cycling the power.  
The device’s low V  
detection circuitry protects the  
CC  
user’s system from low voltage conditions, resetting  
the system when V falls below the set minimum  
CC  
V
trip point. RESET/RESET is asserted until V  
CC  
CC  
—8-lead SOIC  
—8-lead TSSOP  
returns to proper operating level and stabilizes. Four  
industry standard V thresholds are available,  
TRIP  
however, Intersil’s unique circuits allow the threshold  
to be reprogrammed to meet custom requirements or  
to fine-tune the threshold for applications requiring  
higher precision.  
BLOCK DIAGRAM  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET (X4643/5)  
RESET (X4645)  
Data  
Register  
SDA  
Status  
Register  
EEPROM Array  
Command  
Reset &  
Watchdog  
Timebase  
SCL  
Decode &  
Control  
Logic  
S0  
S1  
VCC Threshold  
Reset Logic  
Power-on and  
Low Voltage  
Reset  
+
-
VCC  
VTRIP  
Generation  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
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