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X25640SIT2 PDF预览

X25640SIT2

更新时间: 2024-10-03 15:58:07
品牌 Logo 应用领域
XICOR 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
14页 479K
描述
EEPROM, 8KX8, Serial, CMOS, PDSO14, PLASTIC, SOIC-14

X25640SIT2 技术参数

生命周期:Obsolete包装说明:PLASTIC, SOIC-14
Reach Compliance Code:unknown风险等级:5.82
其他特性:3 WIRE SERIAL INTERFACE; SPI BUS INTERFACE最大时钟频率 (fCLK):1 MHz
JESD-30 代码:R-PDSO-G14长度:8.65 mm
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:14字数:8192 words
字数代码:8000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:8KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL认证状态:Not Qualified
座面最大高度:1.75 mm串行总线类型:SPI
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
最长写入周期时间 (tWC):10 msBase Number Matches:1

X25640SIT2 数据手册

 浏览型号X25640SIT2的Datasheet PDF文件第2页浏览型号X25640SIT2的Datasheet PDF文件第3页浏览型号X25640SIT2的Datasheet PDF文件第4页浏览型号X25640SIT2的Datasheet PDF文件第5页浏览型号X25640SIT2的Datasheet PDF文件第6页浏览型号X25640SIT2的Datasheet PDF文件第7页 
APPLICATION NOTES  
A V A I L A B L E  
AN19 • AN38 • AN41 • AN61  
64K  
X25640  
8K x 8 Bit  
Advanced SPI Serial E2PROM With Block LockTM Protection  
FEATURES  
DESCRIPTION  
The X25640 is a CMOS 65,536-bit serial E2PROM,  
internally organized as 8K x 8. The X25640 features a  
Serial Peripheral Interface (SPI) and software protocol  
allowing operation on a simple three-wire bus. The bus  
signalsareaclockinput(SCK)plusseparatedatain(SI)  
and data out (SO) lines. Access to the device is con-  
trolled through a chip select (CS) input, allowing any  
number of devices to share the same bus.  
1MHz Clock Rate  
Low Power CMOS  
—200µA Standby Current  
—5mA Active Current  
5 Volt Power Supply  
SPI Modes (0,0 & 1,1)  
8K X 8 Bits  
—32 Byte Page Mode  
Block Lock Protection  
—Protect 1/4, 1/2 or all of E2PROM Array  
Built-in Inadvertent Write Protection  
—Power-Up/Power-Down protection circuitry  
—Write Enable Latch  
The X25640 also features two additional inputs that  
provide the end user with added flexibility. By asserting  
the HOLDinput, the X25640 will ignore transitions on its  
inputs, thus allowing the host to service higher priority  
interrupts.TheWPinputcanbeusedasahardwireinput  
to the X25640 disabling all write attempts to the status  
register, thus providing a mechanism for limiting end  
usercapabilityofaltering0, 1/4, 1/2orallofthememory.  
—Write Protect Pin  
Self-Timed Write Cycle  
—5ms Write Cycle Time (Typical)  
High Reliability  
The X25640 utilizes Xicor’s proprietary Direct Write™  
cell, providing a minimum endurance of 100,000 cycles  
and a minimum data retention of 100 years.  
—Endurance: 100,000 cycles  
—Data Retention: 100 Years  
—ESD protection: 2000V on all pins  
8-Lead PDlP Package  
14-Lead SOIC Package  
FUNCTIONAL DIAGRAM  
WRITE  
STATUS  
PROTECT  
REGISTER  
LOGIC  
X DECODE  
LOGIC  
8K BYTE  
ARRAY  
64  
64  
64 X 256  
64 X 256  
SO  
COMMAND  
DECODE  
AND  
CONTROL  
LOGIC  
SI  
SCK  
CS  
HOLD  
128  
128 X 256  
WRITE  
CONTROL  
AND  
TIMING  
LOGIC  
WP  
32  
8
Y DECODE  
DATA REGISTER  
3089 ILL F01  
Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.  
©Xicor, Inc. 1994, 1995, 1996 Patents Pending  
3089-1.8 6/17/96 T4/C4/D1 NS  
Characteristics subject to change without notice  
1

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