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X1242V8-2.7 PDF预览

X1242V8-2.7

更新时间： 2024-01-03 14:36:26
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟光电二极管外围集成电路
页数 文件大小 规格书
24页 148K
描述
Real Time Clock, Volatile, 0 Timer(s), CMOS, PDSO8, PLASTIC, TSSOP-8

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X1242V8-2.7 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：PLASTIC, TSSOP-8Reach Compliance Code：unknown
风险等级：5.75最大时钟频率：0.032 MHz
信息访问方法：SERIAL, 2-WIRE/I2C中断能力：Y
JESD-30 代码：R-PDSO-G8JESD-609代码：e0
长度：4.4 mm端子数量：8
计时器数量：最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：3/3.3 V认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Timer or RTC
最大供电电压：3.6 V最小供电电压：2.7 V
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
最短时间：SECONDS易失性：YES
宽度：3 mmuPs/uCs/外围集成电路类型：TIMER, REAL TIME CLOCK
Base Number Matches：1

X1242V8-2.7 数据手册

 浏览型号X1242V8-2.7的Datasheet PDF文件第1页浏览型号X1242V8-2.7的Datasheet PDF文件第3页浏览型号X1242V8-2.7的Datasheet PDF文件第4页浏览型号X1242V8-2.7的Datasheet PDF文件第5页浏览型号X1242V8-2.7的Datasheet PDF文件第6页浏览型号X1242V8-2.7的Datasheet PDF文件第7页 
X1242 – Preliminary Information  
PIN CONFIGURATION  
quartz crystal is used. Recommended crystal is a Citizen  
CFS-206. The crystal supplies a timebase for a clock/  
oscillator.The internal clock can be driven by an external  
signal on X1, with X2 left unconnected.  
X1242  
8-Pin SOIC  
X1  
X2  
V
V
1
2
8
7
6
5
CC  
Figure 1. Recommended Crystal Connection  
BACK  
RESET  
SCL  
SDA  
3
4
12pF  
V
SS  
X1  
X2  
10M  
X1242  
8-Pin TSSOP  
360K  
68pF  
V
V
SCL  
SDA  
BACK  
1
2
3
4
8
7
6
5
CC  
X1  
X2  
V
SS  
RESET  
POWER CONTROL OPERATION  
The Power control circuit accepts a V  
and a V  
CC  
BACK  
BACK  
input. The power control circuit will switch to V  
when V < V  
PIN DESCRIPTIONS  
Serial Clock (SCL)  
– 0.2V. It will switch back to V  
CC  
BACK  
CC  
when V exceeds V  
.
CC  
BACK  
The SCL input is used to clock all data into and out of  
the device. The input buffer on this pin is always active  
(not gated).  
Figure 2. Power Control  
V
CC  
Internal  
Voltage  
Serial Data (SDA)  
V
BACK  
SDA is a bidirectional pin used to transfer data into and  
out of the device. It has an open drain output and may  
be wire ORed with other open drain or open collector  
outputs.The input buffer is always active (not gated).  
V
= V  
-0.2V  
BACK  
CC  
An open drain output requires the use of a pull-up  
resistor. The output circuitry controls the fall time of the  
output signal with the use of a slope controlled pull-  
down. The circuit is designed for 400kHz 2-wire inter-  
face speeds.  
REAL TIME CLOCK OPERATION  
The Real Time Clock (RTC) uses an external,  
32.768kHz quartz crystal to maintain an accurate inter-  
nal representation of the year, month, day, date, hour,  
minute, and seconds. The RTC has leap-year correc-  
tion and century byte. The clock also corrects for  
months having fewer than 31 days and has a bit that  
controls 24-hour or AM/PM format. When the X1242  
V
BACK  
This input provides a backup supply voltage to the  
device. V supplies power to the device in the  
BACK  
event the V supply fails.  
powers up after the loss of both V  
and V  
, the  
CC  
CC  
BACK  
clock will not increment until at least one byte is written  
to the clock register.  
RESET Output—RESET  
This is a reset signal output. This signal notifies a host  
processor that the watchdog time period has expired or  
Reading the Real Time Clock  
that the voltage has dropped below a fixed V  
threshold. It is an open drain active LOW output.  
The RTC is read by initiating a Read command and  
specifying the address corresponding to the register of  
the Real Time Clock. The RTC Registers can then be  
read in a Sequential Read Mode. Since the clock runs  
continuously and a read takes a finite amount of time,  
there is the possibility that the clock could change dur-  
ing the course of a read operation. In this device, the  
TRIP  
X1, X2  
The X1 and X2 pins are the input and output,  
respectively, of an inverting amplifier that can be con-  
figured for use as an on-chip oscillator. A 32.768kHz  
Characteristics subject to change without notice. 2 of 24  
REV 1.1.7 5/31/01  
www.xicor.com  
1234567...24

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