WS57C256F
HIGH SPEED 32K x 8 CMOS EPROM
KEY FEATURES
• Fast Access Time
• Immune to Latch-UP
— t
= 35 ns
— Up to 200 mA
ACC
— t
= 35 ns
• ESD Protection Exceeds 2000 Volts
• Available in 300 Mil DIP and PLDCC
• DESC SMD No. 5962-86063
CE
• Low Power Consumption
— 200 µA Standby I
CC
GENERAL DESCRIPTION
The WS57C256F is a High Performance 32K x 8 UV Erasable EPROM. It is manufactured using an advanced
CMOS process technology enabling it to operate at speeds as fast as 35 ns Address Access Time (t ) and 35 ns
ACC
Chip Enable Time (t ). It was designed utilizing WSI's patented self-aligned split gate EPROM cell, resulting in a
CE
low power device with a very cost effective die size. The low standby power capability of this 256 K product (200 µA
in a CMOS interface environment) is especially attractive.
This product, with its high speed capability, is particularly appropriate for use with today's fast DSP processors and
high-clock-rate Microprocessors. The WS57C256F's 35 ns speed enables these advanced processors to operate
without introducing any undesirable wait states. The WS57C256F is also ideal for use in modem applications, and is
recommended for use in these applications by the leading modem chip set manufacturer.
The WS57C256F is available in a variety of package types including the space saving 300 Mil DIP, the surface
mount PLDCC, and other windowed and non-windowed options. And its standard JEDEC EPROM pinouts provide
for automatic upgrade density paths for current 64K and 128K EPROM users.
PIN CONFIGURATION
MODE SELECTION
PINS
CE/
PGM
OE
A
A
V
V
OUTPUTS
TOP VIEW
9
0
PP
CC
MODE
Chip Carrier
CERDIP
Read
V
V
X
X
V
V
D
IL
IL
CC CC
OUT
Output
Disable
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
V
V
A
A
A
A
A
X
V
X
X
V
V
V
High Z
High Z
PP
CC
14
13
8
IH
CC CC
A
12
4
3
2
30
32 31
1
A
A
A
A
A
A
A
A
A
A
A
7
6
5
4
3
2
1
0
0
1
2
5
29
6
5
4
3
2
1
0
Standby
Program
V
X
X
X
X
X
V
8
IH
CC CC
A
A
A
A
A
A
A
6
28
27
26
25
24
23
22
21
9
2
9
V
V
V
V
D
7
11
IL
IH
PP
PP
CC
CC
IN
11
NC
8
OE
A
Program
Verify
2
2
OE
9
X
V
X
X
X
X
V
V
V
D
IL
OUT
10
A
10
11
12
13
10
CE/PGM
CE/PGM
Program
Inhibit
10
11
12
13
14
19
18
17
16
15
O
7
V
V
V
V
High Z
NC
O
7
O
IH
IH
PP
CC
O
O
O
O
6
O
O
0
6
5
4
14 15 16
18
20
17
19
O
2
2
V
V
V
V
V
23 H
IL
IL
H
IL
CC CC
O
4
O
3
Signature
GND
5
3
O
O
NC O
O
4 5
V
V
V
V
V
V
EO H
1
2
3
IL
IL
H
IH
CC CC
NOTES:
1. X can be V or V
.
4. Manufacturer Signature.
5. Device Signature.
IL
IH
2. V = V = 12.75 ± 0.25 V.
IH
PP
3. A1 – A8, A10 – A14 = V .
IL
PRODUCT SELECTION GUIDE
PARAMETER
WS57C256F-35
WS57C256F-45
45 ns
WS57C256F-55
55 ns
WS57C256F-70
70 ns
Address Access Time (Max)
Output Enable Time (Max)
35 ns
15 ns
20 ns
25 ns
30 ns
3-13
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