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WLC1515-68LDXS PDF预览

WLC1515-68LDXS

更新时间: 2024-03-03 10:10:28
品牌 Logo 应用领域
英飞凌 - INFINEON /
页数 文件大小 规格书
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描述
WLC1515 is Infineon’s first-generation wireless charging transmitter controller for automotive wit

WLC1515-68LDXS 数据手册

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Wireless charging IC (WLC) 15-W transmitter for automotive  
applications  
Pin information  
Table 1  
Pin#  
WLC1515 pinouts (continued)  
WLC1515  
Example pin assignment  
Description  
Pin name  
for 15W 3-Coil  
MP-A13 transmitter  
Bootstrap power supply for (inverter bank 2) inverter high-side gate  
driver. Connect a capacitor (recommended value 0.1µF) from this pin  
to SW2_1. Also, connect a Schottky diode from VDDD to BST2_1.  
43  
BST2_1  
High-side gate driver for inverter FET (inverter bank 2). Connect to the  
Inverter bank 2, high-side FET gate. Use a wide trace to minimize  
inductance of this connection.  
Inverter switching node for inverter bank 2. Connect this pin to the  
inverter bank 2 switching node with a short and wide trace.  
Inverter input voltage sense. Connect to inverter input voltage, after  
the current sense resistor. Use a dedicated (Kelvin) trace for this  
connection.  
44  
45  
46  
HG2_1  
SW2_1  
VBB_1  
Low-side gate driver for inverter FET (inverter bank 2). Connect to the  
inverter bank 2 low side FET gate.  
Connect to VDDD pin. Connect bypass capacitors (recommended  
values 1µF and 0.1µF) as close to the IC as possible.  
Ground for inverter gate driver. Connect directly to PCB ground plane  
and EPAD. Connect all GND and PGND pins together.  
Low-side gate driver for inverter FET (inverter bank 1). Connect to the  
inverter bank 1 Low side FET gate.  
Inverter switching node for inverter bank 1. Connect this pin to the  
Inverter bank 1 switching node with a short and wide trace.  
High-side gate driver for inverter FET (inverter bank 1). Connect to the  
inverter bank 1 high side FET gate.  
47  
48  
49  
50  
51  
52  
LG2_1  
PVDD_1  
PGND_1  
LG1_1  
SW1_1  
HG1_1  
Bootstrap power supply for (inverter bank 1) inverter high-side gate  
driver. Connect a capacitor (recommended values 0.1µF) from this  
pin to SW1_1. Also, connect a Schottky diode from VDDD to BST1_1.  
53  
BST1_1  
Negative input of input current sense amplifier for inverter. Float this  
pin if it is not used.  
54  
55  
CSNI_1  
CSPI_1  
DNU1  
DNU2  
Positive input of input current sense amplifier for inverter. Float this  
pin if it is not used.  
2
Used for interfacing as Master, with OPTIGA™ Trust I C SDA or With  
OPTIGA™ Trust SPI MISO. The pin is configured for open drain  
connection, connect an external pull-up resistor. Float this pin if it is  
not used.  
56  
57  
GPIO9  
SDA_SEC / SPI_MISO  
SCL_SEC /SPI_CLK  
2
Used for interfacing with OPTIGA™ Trust I C SCL or With OPTIGA  
GPIO10  
Trust SPI CLK. The pin is configured for open drain connection,  
connect an external pull-up resistor. Float this pin if it is not used.  
RESET for OPTIGA™ Trust IC (I2C Version) / MOSI for OPTIGA™ Trust IC  
Chip select for OPTIGA™ TRUST IC(SPI Version)/ Configurable GPIO.  
Configured for using OPTIGA™ Trust in low power mode. Configu-  
rable GPIO.  
58  
59  
GPIO11  
GPIO12  
RES_SEC/SPI_MOSI  
SPI_SS  
Tx coil 2 temperature measurement via thermistor monitoring for  
15W MP-A13 application/External Clock / configurable GPIO. Float  
this pin if it is not used.  
4.5V–24V input supply. Connect a decoupling capacitor (recom-  
mended value 0.1µF) from this pin to GND close to this pin.  
1.8V LDO output for Arm®-M0 power and 1.8V references. Connect a  
decoupling capacitor (recommended value 0.1µF) from this pin to  
ground. Not for external use or loading.  
60  
61  
62  
GPIO13  
TEMP_FB_2/CLK_IN  
VIN  
VCCD  
VDDD 5V LDO output from VIN. Connect a ceramic bypass capacitor  
(recommended value 1µF) from this pin to GND close to the IC.  
Connect all VDDD pins together.  
63  
VDDD  
Datasheet  
8
002-37268 Rev. *B  
2023-07-21  

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