Datasheet > WC32P020-P2M

WC32P020-P2M

更新时间： 2024-01-31 22:53:29

品牌	Logo	应用领域
其他 - ETC		微处理器
页数	文件大小	规格书
14页	209K
描述
Microprocessor

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WC32P020-P2M 数据手册

WC32P020-XXM

68020 FEATURES

■ Selection of Processor Speeds: 16.67, 20, 25 MHz

■ Military Temperature Range: -55°C to +125°C

■ Packaging

■ High-Performance Asynchronous Bus Is Nonmultiplexed and

Full 32-Bits

■ Dynamic Bus Sizing Efficiently Supports 8-/16-/32-Bit

Memories and Peripherals

• 114 pin Ceramic PGA (P2)

■ Full Support of Virtual Memory and Virtual Machine

■ 16 32-Bit General-Purpose Data and Address Registers

• 132 lead Ceramic Quad Flatpack, CQFP (Q2)

■ Object-code compatible with earlier 68000 Microprocessors

■ Two 32-Bit Supervisor Stack Pointers and Five Special-

■ Addressing mode extensions for enhanced support of high-

Purpose Control Registers

level languages

■ 18 Addressing Modes and 7 Data Types

■ 4 GigaByte Direct Addressing Range

■ Bit Field Data Type Accelerates Bit-Oriented Applications–

i.e., Video Graphics

■ Fast On-Chip Instruction Cache Speeds Instructions and

DESCRIPTION

Improves Bus Bandwidth

The WC32P020 is a 32-bit implementation of the 68000 Family

of microprocessors. Using HCMOS technology, the WC32P020

is implemented with 32-bit registers and data paths, 32-bit

addresses, a powerful instruction set, and flexible addressing

modes.

■ Coprocessor Interface to Companion 32-Bit Peripherals–the

68881 and 68882 Floating-Point Coprocessors and the 68851

Paged Memory Management Unit

■ Pipelined Architecture with High Degree of Internal

Parallelism allowing Multiple Instructions to be executed

concurrently

FIG. 1

BLOCK DIAGRAM

December 1998

White Microelectronics • Phoenix, AZ • (602) 437-1520

12 3 4 5 6 7...14

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