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VSC8221

更新时间： 2024-02-01 03:40:33
品牌 Logo 应用领域
美高森美 - MICROSEMI 局域网（LAN）标准
页数 文件大小 规格书
138页 1143K
描述
Single Port 10/100/1000BASE-T PHY with1.25 Gbps SerDes for SFPs/GBICs

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中文翻译

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VSC8221 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Transferred包装说明：FBGA, BGA100,10X10,32
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.78数据速率：1000000 Mbps
JESD-30 代码：S-PBGA-B100端子数量：100
收发器数量：1最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：FBGA封装等效代码：BGA100,10X10,32
封装形状：SQUARE封装形式：GRID ARRAY, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED电源：1.2,3.3 V
认证状态：Not Qualified子类别：Network Interfaces
最大压摆率：0.367 mA表面贴装：YES
电信集成电路类型：ETHERNET TRANSCEIVER温度等级：COMMERCIAL
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

VSC8221 数据手册

 浏览型号VSC8221的Datasheet PDF文件第4页浏览型号VSC8221的Datasheet PDF文件第5页浏览型号VSC8221的Datasheet PDF文件第6页浏览型号VSC8221的Datasheet PDF文件第8页浏览型号VSC8221的Datasheet PDF文件第9页浏览型号VSC8221的Datasheet PDF文件第10页 
VSC8221  
Data Sheet  
12.3 SMi interrupt ....................................................................................................................................... 40  
13  
14  
LED interface ................................................................................................................................................................. 41  
13.1 Serial LED Output ............................................................................................................................... 43  
Test Mode interface (JTAG) ......................................................................................................................................... 44  
14.1 Supported instructions and instruction Codes .................................................................................... 45  
14.2 Boundary-Scan Register Cell Order ................................................................................................... 46  
15  
16  
17  
Enhanced ActiPHY Power Management ................................................................................................................... 47  
15.1 Operation in Enhanced ActiPHY Mode .............................................................................................. 47  
15.2 Low-Power State ................................................................................................................................ 48  
15.3 LP Wake-Up State .............................................................................................................................. 48  
15.4 Normal Operating State ...................................................................................................................... 48  
Ethernet in-line Powered Device Support ................................................................................................................ 49  
16.1 Cisco in-Line Powered Device Detection Mode ................................................................................. 49  
16.2 in-Line Power Ethernet Switch Diagram ............................................................................................. 49  
16.3 in-Line Powered Device Detection (Cisco Method) ............................................................................ 50  
16.4 iEEE 802.3af (DTE Power via MDi) .................................................................................................... 50  
Advanced Test Modes .................................................................................................................................................. 51  
17.1 Ethernet Packet Generator (EPG) ...................................................................................................... 51  
17.2 CRC Counter ...................................................................................................................................... 51  
17.3 Far-End Loopback .............................................................................................................................. 51  
17.4 Near-End Loopback ............................................................................................................................ 52  
17.5 Connector Loopback .......................................................................................................................... 52  
18  
19  
Hardware Configuration Using CMODE pins ........................................................................................................... 53  
18.1 Setting the CMODE Configuration Bits ............................................................................................... 53  
18.2 CMODE Bit Descriptions .................................................................................................................... 54  
18.3 Procedure for Selecting CMODE Pin Pull-Up/Pull-Down Resistor Values ......................................... 56  
EEPROM interface ........................................................................................................................................................ 57  
19.1 Programming Multiple VSC8221s Using the Same EEPROM ........................................................... 57  
20  
21  
22  
PHY Startup and initialization ..................................................................................................................................... 61  
PHY Operating Modes .................................................................................................................................................. 62  
PHY Register Set Conventions ................................................................................................................................... 63  
22.1 PHY Register Set Structure ................................................................................................................ 63  
22.2 PHY Register Set Nomenclature ........................................................................................................ 64  
22.3 PHY Register Bit types ....................................................................................................................... 64  
7 of 10  
VMDS-10106 Revision 4.1  
December 2006  
10  
1...45678910...138

中文翻译

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 		Ethernet Transceiver, CMOS, PBGA260, 19 X 19 MM, PLASTIC, HSBGA-260

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