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V24C15T100A2 PDF预览

V24C15T100A2

更新时间： 2024-02-29 03:24:25
品牌 Logo 应用领域
VICOR /
页数 文件大小 规格书
8页 519K
描述
DC-DC Regulated Power Supply Module, 1 Output, 100W, Hybrid

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V24C15T100A2 技术参数

生命周期：Obsolete包装说明：,
Reach Compliance Code：unknownECCN代码：EAR99
风险等级：5.82模拟集成电路 - 其他类型：DC-DC REGULATED POWER SUPPLY MODULE
最大输入电压：36 V最小输入电压：18 V
标称输入电压：24 VJESD-30 代码：R-XDMA-P7
最大负载调整率：0.2%功能数量：1
输出次数：1端子数量：7
最高工作温度：100 °C最低工作温度：-40 °C
最大输出电压：16.5 V最小输出电压：1.5 V
标称输出电压：15 V封装主体材料：UNSPECIFIED
封装形状：RECTANGULAR封装形式：MICROELECTRONIC ASSEMBLY
认证状态：Not Qualified表面贴装：NO
技术：HYBRID温度等级：INDUSTRIAL
端子形式：PIN/PEG端子位置：DUAL
最大总功率输出：100 W微调/可调输出：YES
Base Number Matches：1

V24C15T100A2 数据手册

 浏览型号V24C15T100A2的Datasheet PDF文件第2页浏览型号V24C15T100A2的Datasheet PDF文件第3页浏览型号V24C15T100A2的Datasheet PDF文件第4页浏览型号V24C15T100A2的Datasheet PDF文件第5页浏览型号V24C15T100A2的Datasheet PDF文件第7页浏览型号V24C15T100A2的Datasheet PDF文件第8页 
CONTROL FUNCTIONS - PR PIN  
Compatible interface architectures include the following:  
DC coupled single-wire interface. All PR pins are directly con-  
nected to one another. This interface supports current sharing  
but is not fault tolerant. Minus In pins must be tied to the same  
electric potential. See Figure 9.  
Parallel Operation  
The PR pin supports paralleling for increased power with N+1  
(N+M) redundancy and phased array capability. Modules of  
the same input voltage, output voltage, and power level will  
current share if all PR pins are suitably interfaced.  
AC coupled single-wire interface. All PR pins are connected to  
a single communication bus through .001µF (500V) capacitors.  
This interface supports current sharing and is fault tolerant  
except for the communication bus. See Figure 10.  
+In  
+Out  
+In  
+Out  
PC  
PR  
PC  
PR  
.001µF  
Module 1  
Module 1  
SC  
SC  
–In  
–Out  
–In  
–Out  
+In  
+Out  
+In  
+Out  
Module 2  
(up to 12)  
Module 2  
(up to 12)  
PC  
PR  
PC  
PR  
.001µF  
SC  
SC  
–In  
–Out  
–In  
–Out  
Ground plane  
Ground plane  
Figure 10—AC coupled single-wire interface.  
Figure 9—DC coupled single-wire interface.  
+Out  
Plane  
• OR’ing diodes may be inserted  
in series with the +Out pin of  
each module to provide output  
fault tolerance. As an example,  
the circuit shown may be used  
to compensate for the voltage  
drop of the diode.  
SC  
• The +Out and –Out  
power buses should be  
designed to minimize  
and balance parasitic  
impedance from each  
module output to the  
load.  
–Out  
+Out  
Volt Drop  
Compensator  
3
1
8
+Out  
SC  
V+  
7
L
O
A
D
R1  
R2  
R3  
6
• This module is designed for  
point of load regulation, where  
remote sensing is not required.  
Active voltage drop  
compensator, as shown here,  
may be used in applications  
with significant distribution  
losses. Details of this circuit are  
available in the design guide.  
Load  
LM10  
SC  
• At the discretion of the  
power system designer,  
a subset of all modules  
within an array may be  
configured as slaves by  
shorting SC to –Out.  
2
V
-
–Out  
4
C1  
+Out  
SC  
–Out  
Ground  
Plane  
–Out  
Figure 11—N+1 module array output connections. Figure 12—OR’ing diodes connections and voltage drop compensation.  
Vicor Corporation Tel: 800-735-6200 Fax: 978-475-6715 Data Sheet: V24C15C100A DC-DC Converter Date: 11-00 Rev. 2  
Page 6 of 8  
Set your site on VICOR at www.vicr.com  
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