Datasheet > UT6716455WCA

UT6716455WCA

更新时间： 2024-09-30 23:41:07

品牌	Logo	应用领域
其他 - ETC		内存集成电路静态存储器 LORA
页数	文件大小	规格书
15页	173K
描述
x8 SRAM

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UT6716455WCA 数据手册

Standard Products

UT67164 Radiation-Hardened 8K x 8 SRAM -- SEU Hard

Data Sheet

December 1999

5-volt operation

FEATURES

Post-radiation AC/DC performance characteristics

guaranteed by MIL-STD-883 Method 1019 testing at

1.0E6 rads(Si)

55ns maximum address access time, single-event upset less

than 1.0E-10 errors//bit day (-55 C to 125+ C)

Asynchronous operation for compatibility with industry-

standard 8K x 8 SRAM

INTRODUCTION

TTL-compatible input and output levels

Three-state bidirectional data bus

Low operating and standby current

The UT67164 SRAM is a high performance, asynchronous,

radiation-hardened, 8K x 8 random access memory

conforming to industry-standard fit, form, and function. The

UT67164 SRAM features fully static operation requiring no

external clocks or timing strobes. UTMC designed and

implemented the UT67164 using an advanced radiation-

hardened twin-well CMOS process. Advanced CMOS

processing along with a device enable/disable function

result in a high performance, power-saving SRAM. The

combinationofradiation-hardness,fastaccesstime,andlow

power consumption make UT67164 ideal for high-speed

systems designed for operation in radiation environments.

Full military operating temperature range, -55 C to 125+ C,

screened to specific test methods listed in Table I MIL-STD-

883 Method 5004 for Class S or Class B

Radiation-hardened process and design; total dose irradiation

testing to MIL-STD-883 Method 1019

- Total-dose: 1.0E6 rads(Si)

- Dose rate upset: 1.0E9 rads (Si)/sec

- Dose rate survival: 1.0E12 rads (Si)/sec

- Single-event upset: <1.0E-10 errors/bit-day

Industry standard (JEDEC) 64K SRAM pinout

Packaging options:

- 28-pin 100-mil center DIP (.600 x 1.2)

- 28-pin 50-mil center flatpack (.700 x .75)

A(12:5)

INPUT

ROW

256 x 256

DRIVERS

DECODERS

MEMORY ARRAY

DATA

INPUT

DRIVERS

A(4:0)

INPUT

DRIVERS

COLUMN

DECODERS

WRITE

COLUMN

I/O

CIRCUIT

DQ(7:0)

DATA

READ

CIRCUIT

OUTPUT

DRIVERS

CHIP ENABLE

OUTPUT ENABLE

WRITE ENABLE

Figure 1. SRAM Block Diagram

12 3 4 5 6 7...15

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与UT6716455WCA相关器件

型号	品牌	获取价格	描述	数据表
UT6716455-WCA	ETC	获取价格	SRAM\|8KX8\|CMOS\| RAD HARD\|FP\|28PIN\|CERAMIC
UT6716455WCC	ETC	获取价格	x8 SRAM
UT6716455-WCC	ETC	获取价格	SRAM\|8KX8\|CMOS\| RAD HARD\|FP\|28PIN\|CERAMIC
UT67164-55WCH	ETC	获取价格	x8 SRAM
UT67164-55WCR	ETC	获取价格	x8 SRAM
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UT67164-55WSR	ETC	获取价格	x8 SRAM
UT67164-70PBH	ETC	获取价格	x8 SRAM
UT67164-70PBR	ETC	获取价格	x8 SRAM
UT6716470PCA	ETC	获取价格	x8 SRAM