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UC3907DWTRG4 PDF预览

UC3907DWTRG4

更新时间： 2024-01-26 22:34:22
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
12页 346K
描述
Load Share Controller 16-SOIC 0 to 70

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中文翻译

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UC3907DWTRG4 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP16,.4
针数：16Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.11
可调阈值：YES模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：10.3 mm湿度敏感等级：2
信道数量：1功能数量：1
端子数量：16最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：15 V
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Power Management Circuits最大供电电流 (Isup)：10 mA
最大供电电压 (Vsup)：35 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：15 V表面贴装：YES
技术：BIPOLAR温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

UC3907DWTRG4 数据手册

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SLUS165C – MARCH 1999 - REVISED JANUARY 2002  
FEATURES  
SOIC-16 DW PACKAGE  
(TOP VIEW)  
D
D
Fully Differential High Impedance Voltage  
Sensing  
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C/S OUT  
C/S (+)  
C/S (–)  
STATUS INDICATE  
CURRENT SHARE BUS  
ADJ OUT  
ADJ INPUT  
COMP  
(+) SENSE  
VCC  
OPTO DRIVE  
Accurate Current Amplifier for Precise  
Current Sharing  
(–) SENSE  
D
D
D
D
Opto Coupler Driving Capability  
POWER RETURN  
ARTIFICIAL GND  
VREF  
1.25% Trimmed Reference  
Master Status Indication  
4.5-V to 35-V Operation  
ISET  
PLCC-20, LCC-20,  
Q OR L PACKAGE  
(TOP VIEW)  
DIL-16 J or N PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
C/S OUT  
C/S (+)  
C/S (–)  
STATUS INDICATE  
CURRENT SHARE BUS  
ADJ OUT  
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2
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12  
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C/S (–)  
(–) SENSE  
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ADJ OUT  
ADJ INPUT  
N/C  
N/C  
(–) SENSE  
POWER RETURN  
ARTIFICIAL GND  
VREF  
ADJ INPUT  
COMP  
POWER RETURN  
ARTIFICIAL GND  
COMP  
(+) SENSE  
(+) SENSE  
10 VCC  
OPTO DRIVE  
9
10 11 12 13  
ISET  
9
DESCRIPTION  
The UCx907 family of load share controller ICs provides all the necessary features to allow  
multiple-independent-power modules to be paralleled such that each module supplies only its proportionate share  
to total-load current.  
This sharing is accomplished by controlling each module’s power stage with a command generated from a  
voltage-feedback amplifier whose reference can be independently adjusted in response to a common-share-bus  
voltage. By monitoring the current from each module, the current share bus circuitry determines which paralleled  
module would normally have the highest output current and, with the designation of this unit as the master, adjusts  
all the other modules to increase their output current to within 2.5% of that of the master.  
The current share bus signal interconnecting all the paralleled modules is a low-impedance, noise-insensitive line  
which will not interfere with allowing each module to act independently should the bus become open or shorted to  
ground. The UC3907 controller will reside on the output side of each power module and its overall function is to supply  
a voltage feedback loop. The specific architecture of the power stage is unimportant. Either switching or linear designs  
may be utilized and the control signal may be either directly coupled or isolated though the use of an optocoupler or  
other isolated medium.  
Other features of the UC3907 include 1.25% accurate reference: a low-loss, fixed-gain current-sense amplifier, a fully  
differential, high-impedance voltage sensing capability, and a status indicator to designate which module is  
performing as master.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2000, Texas Instruments Incorporated  
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中文翻译

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UC3907DWTRG4 替代型号

型号 品牌 替代类型 描述 数据表
UC3907DWG4 TI

完全替代

 LOAD SHARE CONTROLLER
UC3907DW TI

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 Load-Sharing Regulation Controller

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