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UC3877

更新时间: 2024-09-25 22:39:59
品牌 Logo 应用领域
德州仪器 - TI 控制器
页数 文件大小 规格书
19页 740K
描述
Phase Shift Resonant Controller

UC3877 数据手册

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application  
INFO  
UC1875/6/7/8  
UC2875/6/7/8  
UC3875/6/7/8  
available  
Phase Shift Resonant Controller  
FEATURES  
DESCRIPTION  
Zero to 100% Duty Cycle Control  
The UC1875 family of integrated circuits implements control of a bridge  
power stage by phase-shifting the switching of one half-bridge with respect  
to the other, allowing constant frequency pulse-width modulation in combi-  
nation with resonant, zero-voltage switching for high efficiency performance  
at high frequencies. This family of circuits may be configured to provide  
control in either voltage or current mode operation, with a separate  
over-current shutdown for fast fault protection.  
Programmable Output Turn-On Delay  
Compatible with Voltage or Current  
Mode Topologies  
Practical Operation at Switching  
Frequencies to 1MHz  
A programmable time delay is provided to insert a dead-time at the turn-on  
of each output stage. This delay, providing time to allow the resonant  
switching action, is independently controllable for each output pair (A-B,  
C-D).  
Four 2A Totem Pole Outputs  
10MHz Error Amplifier  
Undervoltage Lockout  
With the oscillator capable of operation at frequencies in excess of 2MHz,  
overall switching frequencies to 1MHz are practical. In addition to the stan-  
dard free running mode, with the CLOCKSYNC pin, the user may configure  
these devices to accept an external clock synchronization signal, or may  
lock together up to 5 units with the operational frequency determined by  
the fastest device.  
Low Startup Current –150µA  
Outputs Active Low During UVLO  
Soft-Start Control  
Latched Over-Current Comparator  
With Full Cycle Restart  
Protective features include an undervoltage lockout which maintains all out-  
puts in an active-low state until the supply reaches a 10.75V threshold.  
1.5V hysteresis is built in for reliable, boot-strapped chip supply.  
Over-current protection is provided, and will latch the outputs in the OFF  
state within 70nsec of a fault. The current-fault circuitry implements  
Trimmed Reference  
full-cycle restart operation.  
(continued)  
BLOCK DIAGRAM  
UDG-95073  
SLUS229B - JULY 1999 - REVISED JUNE 2004  

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