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UC2907L PDF预览

UC2907L

更新时间： 2024-02-26 18:21:46
品牌 Logo 应用领域
德州仪器 - TI 电源电路电源管理电路控制器
页数 文件大小 规格书
7页 271K
描述
Load-Sharing Regulation Controller

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中文翻译

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UC2907L 技术参数

生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCN, LCC20,.35SQ针数：20
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.68
Is Samacsys：N可调阈值：YES
模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUITJESD-30 代码：S-CQCC-N20
长度：8.89 mm信道数量：1
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QCCN
封装等效代码：LCC20,.35SQ封装形状：SQUARE
封装形式：CHIP CARRIER电源：15 V
认证状态：Not Qualified座面最大高度：2.54 mm
子类别：Power Management Circuits最大供电电流 (Isup)：10 mA
最大供电电压 (Vsup)：35 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：15 V表面贴装：YES
技术：BIPOLAR温度等级：INDUSTRIAL
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD宽度：8.89 mm
Base Number Matches：1

UC2907L 数据手册

 浏览型号UC2907L的Datasheet PDF文件第2页浏览型号UC2907L的Datasheet PDF文件第3页浏览型号UC2907L的Datasheet PDF文件第4页浏览型号UC2907L的Datasheet PDF文件第5页浏览型号UC2907L的Datasheet PDF文件第6页浏览型号UC2907L的Datasheet PDF文件第7页 
UC1907  
UC2907  
UC3907  
Load Share Controller  
FEATURES  
DESCRIPTION  
Fully Differential High Impedance  
Voltage Sensing  
The UC3907 family of Load Share Controller ICs provides all the necessary  
features to allow multiple independent power modules to be paralleled such  
that each module supplies only its proportionate share to total load current.  
Accurate Current Amplifier for Precise  
Current Sharing  
This sharing is accomplished by controlling each module’s power stage  
with a command generated from a voltage feedback amplifier whose refer-  
ence can be independently adjusted in response to a common share bus  
voltage. By monitoring the current from each module, the current share bus  
circuitry determines which paralleled module would normally have the high-  
est output current and, with the designation of this unit as the master, ad-  
justs all the other modules to increase their output current to within 2.5% of  
that of the master.  
Opto Coupler Driving Capability  
1.25% Trimmed Reference  
Master Status Indication  
4.5V TO 35V Operation  
The current share bus signal interconnecting all the paralleled modules is a  
low-impedance, noise-insensitive line which will not interfere with allowing  
each module to act independently should the bus become open or shorted  
to ground. The UC3907 controller will reside on the output side of each  
power module and its overall function is to supply a voltage feedback loop.  
The specific architecture of the power stage is unimportant. Either switch-  
ing or linear designs may be utilized and the control signal may be either di-  
rectly coupled or isolated though the use of an opto coupler or other  
isolated medium.  
Other features of the UC3907 include 1.25% accurate reference: a  
low-loss, fixed gain current sense amplifier,  
a
fully differential,  
high-impedance voltage sensing capability, and a status indicator to desig-  
nate which module is performing as master.  
BLOCK DIAGRAM  
VOLTAGE ERROR AMPLIFIER  
(+) SENSE 11  
–
12 COMP  
V
+
CC  
VCC (4.5V TO 35V) 10  
0.25V  
DRIVE  
1.75V  
9
OPTO DRIVE  
AMPLIFIER  
1.0V  
–
DRV  
+
GROUND  
AMPLIFIER  
V
REF  
1.750V  
1k  
–
GND  
+
20k  
50k  
(–) SENSE  
POWER RTN  
ARTIFICIAL GND  
VREF  
4
5
6
7
1
8
ISET  
14 ADJ OUT  
ADJUST  
AMPLIFIER  
50mV  
13 ADJ INPUT  
–
17.5k  
ADJ  
+
C/S OUT  
40k  
BUFFER  
AMPLIFIER  
CURRENT SENSE  
AMPLIFIER  
2k  
2k  
–
C/S (–)  
C/S (+)  
3
2
100  
15 CURRENT SHARE BUS  
16 STATUS INDICATE  
–
+
+
10k  
40k  
UDG-99052  
SLUS165 - MARCH 1999  
1234567

中文翻译

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