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UAA2067G/C1 PDF预览

UAA2067G/C1

更新时间: 2024-02-29 20:00:43
品牌 Logo 应用领域
恩智浦 - NXP 无绳技术电信信息通信管理电信集成电路
页数 文件大小 规格书
27页 221K
描述
IC TELECOM, CORDLESS, SUPPORT CIRCUIT, PQFP32, PLASTIC, SOT-401, LQFP-32, Cordless Telephone IC

UAA2067G/C1 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:32
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84Is Samacsys:N
JESD-30 代码:S-PQFP-G32长度:5 mm
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-30 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
认证状态:Not Qualified座面最大高度:1.6 mm
标称供电电压:3.6 V表面贴装:YES
技术:BICMOS电信集成电路类型:CORDLESS TELEPHONE SUPPORT CIRCUIT
温度等级:OTHER端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:5 mmBase Number Matches:1

UAA2067G/C1 数据手册

 浏览型号UAA2067G/C1的Datasheet PDF文件第4页浏览型号UAA2067G/C1的Datasheet PDF文件第5页浏览型号UAA2067G/C1的Datasheet PDF文件第6页浏览型号UAA2067G/C1的Datasheet PDF文件第8页浏览型号UAA2067G/C1的Datasheet PDF文件第9页浏览型号UAA2067G/C1的Datasheet PDF文件第10页 
Philips Semiconductors  
Product specification  
Image reject 1800 MHz transceiver  
for DECT applications  
UAA2067G  
FUNCTIONAL DESCRIPTION  
Receive section  
Transmit section  
The circuit contains two balanced mixers, each of which is  
driven by the RFLO and IFLO signals. The output signal of  
the two mixers is summed and buffered to obtain the single  
upper-sideband signal at frequency RFLO + IFLO.  
The circuit contains a balanced low-noise amplifier  
followed by two high dynamic range mixers. The local  
oscillator signals, shifted in phase to 0 and 90° mix the  
amplified RF signal to the I and Q channels.These two  
channels are buffered, phase shifted by 45° and 135°  
respectively, amplified and recombined internally to realize  
the image rejection. Signals at the RF input at RFLO IF  
frequencies are rejected through the signal processing  
while signals at the RFLO + IF frequencies form the  
IF signals.  
With the use of an off-chip time constant, the ramping  
circuit defines the power ramp-up and ramp-down of the  
pre-amplifier output signal.  
Balanced signals are used for minimizing crosstalk due to  
package parasitics.  
Fast switching, on/off, of the transmit section is controlled  
by the hardware input PDTX.  
An image rejection of typically 34 dB is obtained for an IF  
between 100 and 120 MHz.  
The power supply voltage of the transmit mixers, the  
adding circuit and ramping circuit is taken from the  
Balanced signals are used for minimizing crosstalk due to  
package parasitics. The IF output is single-ended.  
The typical load is 50 .  
V
CC(MIX) and GND6 for maximum isolation from the  
preamplifier output stage.  
Fast switching, on/off of the receive section is controlled  
by the hardware input PDRX.  
OPERATING MODES  
To use the IC, all VCC pins must be connected to the  
supply voltage.  
RFLO section  
For transceiving a DECT signal, the RFLO and IFLO  
sections should be powered-on. After a stable frequency  
has been reached (mainly determined by the synthesizer  
design), the receiver or transmitter can be powered-on.  
The high-frequency oscillator (RFLO oscillator) supplies  
the local oscillator signal for the down-conversion (receive)  
and up-conversion (transmit) mixers. This VCO uses an  
on-chip regulator for a power-supply voltage-independent  
output frequency. The buffered VCO signal is fed into a  
phase shifter and an off-chip prescaler-synthesizer.  
The output signal of the phase-shifter is used for driving  
the RX and TX mixers. Due to the good isolation in the  
buffer stages, a very small change in VCO frequency is  
obtained when switching the RX and TX mixers on.  
GMSK data modulation can be supplied in two different  
ways: the data is directly modulated on IFLO or RFLO.  
The ramping of the power level can be set with a time  
constant that is external to the IC.  
Table 1 gives the definition of the polarity of the switching  
signals on the receive, the RFLO, the IFLO and the  
transmit sections.  
Fast switching, on/off of the oscillator section is controlled  
by the hardware input PDRFLO.  
IFLO section  
The low-frequency oscillator (IFLO oscillator) internally  
supplies the local oscillator signal to the single-sideband  
transmit mixer. The buffered VCO signal is fed into a  
phase shifter. The output signal of the phase-shifter is  
used for driving the TX mixers.  
Due to the good isolation in the buffer stages, a very small  
change in VCO frequency is obtained when switching the  
TX mixer on.  
Fast switching on/off of the oscillator section is controlled  
by the hardware input PDIFLO input.  
1996 Oct 22  
7

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