Datasheet > U62H256SA55

U62H256SA55

更新时间： 2025-09-06 23:38:47

品牌	Logo	应用领域
其他 - ETC		内存集成电路静态存储器光电二极管
页数	文件大小	规格书
9页	124K
描述
x8 SRAM

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中文翻译

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数据手册

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U62H256SA55 数据手册

U62H256S

Automotive Fast 32K x 8 SRAM

Description

Features

The U62H256S is a static RAM

manufactured using a CMOS pro-

cess technology with the following

operating modes:

32768 x 8 bit static CMOS RAM

information is available. The data

outputs have no preferred state. If

the memory is driven by CMOS

levels in the active state, and if

there is no change of the address,

data input and control signals W or

G, the operating current (I_O= 0 mA)

drops to the value of the operating

current in the Standby mode. The

Read cycle is finished by the falling

edge of W, or by the rising edge of

E, respectively.

Data retention is guaranteed down

to 2 V. With the exception of E, all

inputs consist of NOR gates, so

that no pull-up/pull-down resistors

are required.

35 and 55 ns Access Time

Common data inputs and

data outputs

Three-state outputs

Typ. operating supply current

35 ns: 45mA

- Read

- Write

- Standby

- Data Retention

The memory array is based on a

MIXMOS cell.

55 ns: 30mA

The circuit is activated by the fal-

ling edge of E. The address and

control inputs open simultaneously.

According to the information of W

and G, the data inputs, or outputs,

are active. During the active state

E = L each address change leads

to a new Read or Write cycle. In a

Read cycle, the data outputs are

activated by the falling edge of G,

afterwards the data word will be

available at the outputs DQ0-DQ7.

After the address change, the data

outputs go High-Z until the new

Standby current < 2 mA

TTL/CMOS-compatible

Automatic reduction of power

dissipation in long Read or Write

cycles

Power supply voltage 5 V

Operating temperature range

-40 °C to 85 °C

-40 °C to 125 °C

CECC 90000 Quality Standard

ESD protection > 2000 V

(MIL STD 883C M3015.7)

Latch-up immunity >100 mA

Package:

SOP28 (300 mil)

Pin Configuration

Pin Description

VCC

A14

A12

A13

Signal Name Signal Description

A0 - A14

Address Inputs

A11

DQ0 - DQ7

Data In/Out

Chip Enable

Output Enable

Write Enable

Power Supply Voltage

Ground

SOP

A10

DQ7

VCC

VSS

DQ0

DQ1

DQ2

VSS

DQ6

DQ5

DQ4

DQ3

Top View

March 8, 1999

12 3 4 5 6 7...9

中文翻译

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