TPSM843320E
ZHCSTQ8 – JANUARY 2024
www.ti.com.cn
5.5 Electrical Characteristics (Module)
TJ = –55°C to +125°C, VVIN = 4V - 18V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY VOLTAGE
IQ(VIN)
VIN operating non-switching supply current VEN = 1.3V, VFB = 550mV, VVIN = 12V, 1MHz
1200
15
1600
25
µA
µA
V
ISD(VIN)
VIN shutdown supply current
VIN UVLO rising threshold
VIN UVLO hysteresis
VEN = 0V, VVIN = 12V
VIN rising
3.9
4
4.1
150
mV
ENABLE AND UVLO
VEN(rise)
EN voltage rising threshold
EN voltage falling threshold
EN voltage hysteresis
EN rising, enable switching
EN falling, disable switching
1.2
1.1
1.25
V
V
VEN(fall)
1.05
0.4
VEN(hyst)
100
1.5
mV
µA
µA
EN pin sourcing current
EN pin sourcing current
VEN = 1.1V
VEN = 1.3V
11.6
INTERNAL LDO BP5
VBP5
Internal LDO BP5 output voltage
BP5 dropout voltage
VVIN = 12V
4.5
75
V
VVIN – VBP5, VVIN = 3.8V
VVIN = 12V
350
505
mV
mA
BP5 short-circuit current limit
REFERENCE VOLTAGE
VFB
Feedback Voltage
Input leakage current into FB pin
TJ = –55°C to 125°C
495
500
1
mV
nA
VFB = 500mV, non-switching, VVIN = 12V,
VEN = 0V
IFB(LKG)
SWITCHING FREQUENCY AND OSCILLATOR
fSW
Switching frequency
Switching frequency
Switching frequency
Switching frequency
Switching frequency
RFSEL = 24.3kΩ
RFSEL = 17.4kΩ
RFSEL = 11.8kΩ
RFSEL = 8.06kΩ
RFSEL = 4.99kΩ
450
675
500
750
550
825
kHz
kHz
kHz
kHz
kHz
fSW
fSW
900
1000
1500
2200
1100
1650
2420
fSW
1350
1980
fSW
SYNCHRONIZATION
VIH(sync)
High-level input voltage
Low-level input voltage
1.8
V
V
VIL(sync)
0.8
SOFT-START
tSS1
Soft-start time
Soft-start time
Soft-start time
Soft-start time
RMODE = 1.78kΩ
RMODE = 2.21kΩ
RMODE = 2.74kΩ
RMODE = 3.32kΩ
0.5
1
ms
ms
ms
ms
tSS2
tSS3
2
tSS4
4
POWER STAGE
RDS(on)HS
RDS(on)LS
High-side MOSFET on-resistance
Low-side MOSFET on-resistance
TJ = 25°C, VVIN = 12V, VBOOT-SW = 4.5V
TJ = 25°C, VBP5 = 4.5V
25
mΩ
mΩ
13.9
TJ = 25°C. Recover high-side gate drive
upon VIN falling
VVIN(TH_f)
VIN throttle falling threshold
15.2
15.5
15.8
V
VBOOT-SW(UV_r)
VBOOT-SW(UV_f)
TON(min)
BOOT-SW UVLO rising threshold
BOOT-SW UVLO falling threshold
Minimum ON pulse width
VBOOT-SW rising
VBOOT-SW falling
IOUT > ½ IL_PK-PK
3.2
2.8
30
V
V
37
ns
ns
TOFF(min)
Minimum OFF pulse width (1)
115
140
CURRENT SENSE AND OVERCURRENT PROTECTION
IOC_HS_pk1
IOC_HS_pk2
IOC_LS_src1
IOC_LS_src2
IOC_LS_snk
High-side peak current limit(3A)
High-side peak current limit(3A)
Low-side sourcing current limit(3A)
Low-side sourcing current limit(3A)
Low-side sinking current limit
RMODE = 1.78kΩ
RMODE = 22.1kΩ
RMODE = 1.78kΩ
RMODE = 22.1kΩ
Current into SW pin
4.6
2.9
3.8
2.7
1.9
4.9
3.3
4.2
3.0
5.1
3.5
4.5
3.3
A
A
A
A
A
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Product Folder Links: TPSM843320E
English Data Sheet: SLUSFH2