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TPSM843320E PDF预览

TPSM843320E

更新时间: 2024-04-09 18:59:48
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德州仪器 - TI 电源电路
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38页 2029K
描述
具有扩展工作温度范围的 4V 至 18V 输入、3A 同步 SWIFT? 降压电源模块

TPSM843320E 数据手册

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TPSM843320E  
ZHCSTQ8 – JANUARY 2024  
www.ti.com.cn  
4 Pin Configuration and Functions  
4-1. SIT Package 15-Pin uSiP (Top View)  
4-1. Pin Functions  
PIN  
TYPE(1)  
DESCRIPTION  
NAME  
NO.  
Feedback pin for output voltage regulation. Connect this pin to the midpoint of a resistor divider to set  
the output voltage.  
FB  
1
I
AGND  
BP5  
2
3
4
5
O
O
I
Ground return for internal analog circuits  
Internal 5V regulator output. Bypass this pin with a 2.2μF capacitor to AGND.  
Open-drain power-good indicator  
PG  
MODE  
A resistor to ground selects the current limit, soft-start rate, and PWM ramp amplitude.  
Enable pin. Float to enable, enable and disable with an external signal, or adjust the input undervoltage  
lockout with a resistor divider.  
EN  
6
I
Ground return for the power stage. This pin is internally connected to the source of the low-side  
MOSFET.  
PGND  
7, 8, 9  
Input power to the power stage. Low impedance bypassing of these pins to PGND is critical. A 47nF to  
100nF capacitor from VIN to PGND close to IC is required.  
VIN  
10  
11  
12  
I
SW  
DNC  
DNC  
Switch node of the module, used for monitoring only  
Supply for the internal high-side MOSFET gate driver. This pin is monitoring only because the capacitor  
to SW pin is integrated  
BOOT  
SYNC/  
FSEL  
Frequency select and external clock synchronization. A resistor to ground sets the switching frequency  
of the device. An external clock can also be applied to this pin to synchronize the switching frequency.  
13  
14  
15  
I
VOUT  
O
Buck output voltage. Connect output capacitors to this node.  
Thermal pad connected to PGND  
PAD/  
PGND  
(1) I = input, O = output  
Copyright © 2024 Texas Instruments Incorporated  
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Product Folder Links: TPSM843320E  
English Data Sheet: SLUSFH2  
 
 

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