Datasheet > TN0702_13

TN0702_13

更新时间： 2024-02-12 06:05:02

品牌	Logo	应用领域
超科 - SUPERTEX		/
页数	文件大小	规格书
5页	631K
描述
N-Channel Enhancement-Mode Vertical DMOS FET

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中文翻译

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TN0702_13 数据手册

Supertex inc.

TN0702

N-Channel Enhancement-Mode

Vertical DMOS FET

Features

General Description

This low threshold, enhancement-mode (normally-off)

transistor utilizes a vertical DMOS structure and Supertex’s

well-proven, silicon-gate manufacturing process. This

combination produces a device with the power handling

capabilities of bipolar transistors and the high input impedance

and positive temperature coefﬁcient inherent in MOS devices.

Characteristic of all MOS structures, this device is free

from thermal runaway and thermally-induced secondary

breakdown.

► Low threshold - 1.6V max.

► High input impedance

► Low input capacitance - 130pF typical

► Fast switching speeds

► Low on-resistance guaranteed at V_GS= 2, 3, and 5V

► Free from secondary breakdown

► Low input and output leakage

Applications

► Logic level interfaces – ideal for TTL and CMOS

► Solid state relays

► Battery operated systems

► Photo voltaic drives

► Analog switches

Supertex’s vertical DMOS FETs are ideally suited to a wide

range of switching and amplifying applications where very

low threshold voltage, high breakdown voltage, high input

impedance, low input capacitance, and fast switching speeds

are desired.

► General purpose line drivers

► Telecom switches

Ordering Information

Product Summary

R_DS(ON)

I_D(ON)

Part Number

Package Option

Packing

V_GS(th)

(max)

BV_DSS/BV_DGS

(max)

(min)

TN0702N3-G

TO-92

1000/Bag

20V

1.3Ω

0.5A

1.0V

TN0702N3-G P002

TN0702N3-G P003

Pin Conﬁguration

TN0702N3-G P005 TO-92

TN0702N3-G P013

2000/Reel

TN0702N3-G P014

-G denotes a lead (Pb)-free / RoHS compliant package.

Contact factory for Wafer / Die availablity.

Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.

DRAIN

SOURCE

Absolute Maximum Ratings

Parameter

GATE

Value

BV_DSS

BV_DGS

±20V

TO-92

Drain-to-source voltage

Drain-to-gate voltage

Product Marking

Gate-to-source voltage

Operating and storage temperature

-55^OC to +150^OC

SiTN

0 7 0 2

YYWW

YY = Year Sealed

Absolute Maximum Ratings are those values beyond which damage to the device

may occur. Functional operation under these conditions is not implied. Continuous

operation of the device at the absolute rating level may affect device reliability. All

voltages are referenced to device ground.

WW = Week Sealed

= “Green” Packaging

Package may or may not include the following marks: Si or

TO-92

Typical Thermal Resistance

Package

θ_ja

TO-92

132^OC/W

Doc.# DSFP-TN0702

C080813

Supertex inc.

www.supertex.com

12 3 4 5

中文翻译

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与TN0702_13相关器件

型号	品牌	获取价格	描述	数据表
TN0702N3	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
TN0702N3-G	SUPERTEX	获取价格	Small Signal Field-Effect Transistor, 0.53A I(D), 20V, 1-Element, N-Channel, Silicon, Meta
TN0702N3-GP002	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
TN0702N3-GP003	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
TN0702N3-GP005	MICROCHIP	获取价格	SMALL SIGNAL, FET
TN0702N3-GP005	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
TN0702N3-GP013	MICROCHIP	获取价格	SMALL SIGNAL, FET
TN0702N3-GP013	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
TN0702N3-GP014	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
TN0702N3P004	SUPERTEX	获取价格	Small Signal Field-Effect Transistor, 0.6A I(D), 20V, 1-Element, N-Channel, Silicon, Metal

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