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TLE7240 PDF预览

TLE7240

更新时间： 2024-02-02 10:04:18
品牌 Logo 应用领域
英飞凌 - INFINEON 驱动
页数 文件大小 规格书
28页 589K
描述
Stitch low Driver

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TLE7240 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：SOP,Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.76接口集成电路类型：BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码：R-PDSO-G24功能数量：1
端子数量：24输出电流流向：SINK
标称输出峰值电流：0.21 A封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
表面贴装：YES端子形式：GULL WING
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

TLE7240 数据手册

 浏览型号TLE7240的Datasheet PDF文件第7页浏览型号TLE7240的Datasheet PDF文件第8页浏览型号TLE7240的Datasheet PDF文件第9页浏览型号TLE7240的Datasheet PDF文件第11页浏览型号TLE7240的Datasheet PDF文件第12页浏览型号TLE7240的Datasheet PDF文件第13页 
SPI Driver for Enhanced Relay Control  
SPIDER - TLE 7240SL  
General Product Characteristics  
Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the  
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are  
not designed for continuous repetitive operation.  
4.2  
Functional Range  
Pos.  
Parameter  
Symbol  
Limit Values  
Unit  
Conditions  
Min.  
3.0  
4.5  
Max.  
5.5  
5.5  
4.2.1  
4.2.1  
4.2.2  
Digital supply voltage  
Analog supply voltage  
extended supply range  
VDD  
VDDA  
VDDA  
V
V
–
–
4.0  
4.5  
parameter  
deviations are  
possible  
4.2.3  
4.2.4  
Digital Supply current in reset mode IDD(RST)  
–
–
10  
0.5  
µA  
mA  
Tj = 85 °C  
Digital supply current  
IDD(ON)  
V
DD = VDDA = 5 V  
(all channels active)  
V
RST = VCS = VDD  
VSCLK = 0 V  
VIN = 0 V  
4.2.5  
Analog supply current  
(all channels active)  
IDDA(ON)  
–
5
mA  
Note:Within the functional range the IC operates as described in the circuit description. The electrical  
characteristics are specified within the conditions given in the related electrical characteristics table.  
4.3  
Thermal Resistance  
Note:This thermal data was generated in accordance with JEDEC JESD51 standards.  
For more information, go to www.jedec.org.  
Pos.  
Parameter  
Symbol  
Limit Values  
Unit  
Conditions  
Min.  
–
Typ.  
–
Max.  
25  
1) 2)  
4.3.6  
4.3.7  
4.3.8  
Junction to Soldering Point  
RthJSP  
RthJA  
RthJA  
K/W  
K/W  
K/W  
1) 3)  
1) 4)  
Junction to Ambient  
(1s0p+600mm2Cu)  
Junction to Ambient (2s2p)  
–
–
68  
62  
–
–
1) Not subject to production test, specified by design  
2) Specified RthJSP value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature).  
Ta = 25 °C. LS1 to LS8 are dissipating 1 W power (0.125 W each).  
3) Specified RthJA value is according to Jedec JESD51-2,-3 at natural convection on FR4 1s0p board; The product  
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600mm2  
and 70 µm thickness. Ta = 25 °C, LS1 to LS8 are dissipating 1 W power (0.125 W each).  
4) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product  
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu).  
Ta = 25 °C, LS1 to LS8 are dissipating 1 W power (0.125 W each).  
Data Sheet  
10  
Rev. 1.1, 2009-04-15  
1...78910111213...28

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