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THS3201DGKG4 PDF预览

THS3201DGKG4

更新时间： 2024-10-01 19:58:27
品牌 Logo 应用领域
德州仪器 - TI 放大器光电二极管商用集成电路
页数 文件大小 规格书
60页 1940K
描述
1 CHANNEL, VIDEO AMPLIFIER, PDSO8, GREEN, PLASTIC, MSOP-8

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THS3201DGKG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：MSOP
包装说明：TSSOP,针数：8
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.06
其他特性：IT CAN ALSO OPERATE WITH 6.6V TO 15V SINGLE SUPPLY标称带宽：1800000 kHz
商用集成电路类型：VIDEO AMPLIFIERJESD-30 代码：S-PDSO-G8
JESD-609代码：e4长度：3 mm
湿度敏感等级：1信道数量：1
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：SQUARE封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260认证状态：Not Qualified
座面最大高度：1.1 mm最大供电电压 (Vsup)：7.5 V
最小供电电压 (Vsup)：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3 mmBase Number Matches：1

THS3201DGKG4 数据手册

 浏览型号THS3201DGKG4的Datasheet PDF文件第2页浏览型号THS3201DGKG4的Datasheet PDF文件第3页浏览型号THS3201DGKG4的Datasheet PDF文件第4页浏览型号THS3201DGKG4的Datasheet PDF文件第5页浏览型号THS3201DGKG4的Datasheet PDF文件第6页浏览型号THS3201DGKG4的Datasheet PDF文件第7页 
DAC8218  
www.ti.com  
SBAS460A –MAY 2009–REVISED DECEMBER 2009  
Octal, 14-Bit, Low-Power, High-Voltage Output, Serial Input  
DIGITAL-TO-ANALOG CONVERTER  
Check for Samples: DAC8218  
1
FEATURES  
DESCRIPTION  
2345  
•
Bipolar Output: ±2V to ±16.5V  
Unipolar Output: 0V to +33V  
14-Bit Resolution  
The DAC8218 is  
digital-to-analog converter (DAC). With  
a
low-power, octal, 14-bit  
5V  
a
•
reference, the output can either be a bipolar ±15V  
voltage when operating from dual ±15.5V (or higher)  
power supplies, or a unipolar 0V to +30V voltage  
when operating from a +30.5V (or higher) power  
supply. With a 5.5V reference, the output can either  
be a bipolar ±16.5V voltage when operating from dual  
±17V (or higher) power supplies, or a unipolar 0V to  
+33V voltage when operating from a +33.5V (or  
higher) power supply. This DAC provides low-power  
operation, good linearity, and low glitch over the  
specified temperature range of –40°C to +105°C. This  
device is trimmed in manufacturing and has very low  
zero-code and gain error. In addition, system level  
calibration can be performed to achieve ±1 LSB  
bipolar zero/full-scale error with bipolar supplies, or  
±1 LSB zero code/full-scale error with a unipolar  
supply, over the entire signal chain. The output range  
can be offset by using the DAC offset register.  
•
•
•
•
Low Power: 14.4mW/Ch (Bipolar Supply)  
Relative Accuracy: 1 LSB Max  
Low Zero/Full-Scale Error  
–
–
Before User Calibration: ±2.5 LSB Max  
After User Calibration: ±1 LSB  
•
•
•
•
•
•
•
•
•
•
Flexible System Calibration  
Low Glitch: 4nV-s  
Settling Time: 15μs  
Channel Monitor Output  
Programmable Gain: x4/x6  
Programmable Offset  
SPI™: Up to 50MHz, 1.8V/3V/5V Logic  
Schmitt Trigger Inputs  
The DAC8218 features a standard, high-speed serial  
peripheral interface (SPI) that operates at up to  
50MHz and is 1.8V, 3V, and 5V logic compatible, to  
communicate with a DSP or microprocessor. The  
input data of the device are double-buffered. An  
asynchronous load input (LDAC) transfers data from  
the DAC data register to the DAC latch. The  
asynchronous CLR input sets the output of all eight  
DACs to AGND. The VMON pin is a monitor output  
that connects to the individual analog outputs, the  
offset DAC, the reference buffer outputs, and two  
external inputs through a multiplexer (mux).  
Daisy-Chain with Sleep Mode Enhancement  
Packages: QFN-48 (7x7mm), TQFP-64  
(10x10mm)  
APPLICATIONS  
•
•
•
Automatic Test Equipment  
PLC and Industrial Process Control  
Communications  
IOVDD  
DGND  
DVDD  
AVDD  
AVSS  
REF-A  
Analog Monitor  
DAC8218  
VOUT-0  
The DAC8218 is pin-to-pin and function-compatible  
with the DAC8718 (16-bit) and the DAC7718 (12-bit).  
VOUT-7  
AIN-0  
AIN-1  
Ref Buffer A  
Ref Buffer B  
OFFSET-B  
VMON  
Reference  
Buffer A  
OFFSET  
DAC A  
WAKEUP  
SCLK  
CS  
Command  
Registers  
To DAC-0, DAC-1,  
DAC-2, DAC-3  
(When Correction Engine Disabled)  
SDI  
OFFSET-A  
VOUT-0  
SDO  
DAC-0  
Input Data  
Register 0  
Correction  
Engine  
DAC-0  
Data  
Latch-0  
To DAC-0, DAC-1,  
DAC-2, DAC-3  
LDAC  
RST  
RSTSEL  
LDAC  
User Calibration:  
Zero Register 0  
Gain Regsiter 0  
Internal Trimming  
Zero/Gain; INL  
AGND-A  
CLR  
To DAC-4, DAC-5, DAC-6, DAC-7  
USB/BTC  
GPIO-0  
GPIO-1  
GPIO-2  
OFFSET-B  
AGND-B  
VOUT-7  
OFFSET  
DAC B  
(Same Function Blocks  
for All Channels)  
Reference  
Buffer B  
Power-Up/  
Power-Down  
Control  
AIN-0  
AIN-1  
DGND  
DVDD  
AVDD  
AVSS  
REF-B  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
4
5
DSP is a trademark of Texas Instruments.  
SPI, QSPI are trademarks of Motorola Inc.  
Microwire is a trademark of National Semiconductor.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  
1234567...60

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THS3201DGKG4 替代型号

型号 品牌 替代类型 描述 数据表
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