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THS1401IPFBG4 PDF预览

THS1401IPFBG4

更新时间: 2024-02-16 17:11:56
品牌 Logo 应用领域
德州仪器 - TI 转换器模数转换器
页数 文件大小 规格书
26页 585K
描述
14-Bit, 1/3/8 MSPS, DSP-COMPATIBLE ANALOG-TO-DIGITAL CONVERTERS WITH INTERNAL REFERENCE AND PGA

THS1401IPFBG4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:QFP
包装说明:GREEN, PLASTIC, TQFP-48针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.69
Is Samacsys:N最大模拟输入电压:3.6 V
最小模拟输入电压:最长转换时间:1 µs
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-PQFP-G48
JESD-609代码:e4长度:7 mm
最大线性误差 (EL):0.0153%湿度敏感等级:2
模拟输入通道数量:1位数:14
功能数量:1端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:BINARY, 2'S COMPLEMENT BINARY输出格式:PARALLEL, WORD
封装主体材料:PLASTIC/EPOXY封装代码:TFQFP
封装等效代码:TQFP48,.35SQ封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
采样速率:1 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:1.2 mm子类别:Other Converters
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7 mm
Base Number Matches:1

THS1401IPFBG4 数据手册

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www.ti.com  
SLAS248D − DECEMBER 1999 − REVISED SEPTEMBER 2005  
PARAMETER MEASUREMENT INFORMATION  
sample timing  
The THS1401/3/8 core is based on a pipeline architecture with a latency of 9.5 samples. The conversion results  
appear on the digital output 9.5 clock cycles after the input signal was sampled.  
S11  
S12  
S9  
S10  
Analog  
Input  
t
t
w(CLK)  
w(CLK)  
CLK  
t
d
Data  
Out  
C3  
C1  
C2  
Figure 1. Sample Timing  
The parallel interface of the THS1401/3/8 ADC features 3-state buffers, making it possible to directly connect  
it to a data bus. The output buffers are enabled by driving the OE input low.  
Besides the sample results, it is also possible to read back the values of the control register, the PGA register,  
and the offset register. Which register is read is determined by the address inputs A[1,0]. The ADC results are  
available at address 0.  
The timing of the control signals is described in the following sections.  
7

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