Philips Semiconductors
Preliminary specification
I2C-bus controlled BTSC stereo/SAP decoder
TDA9850
FEATURES
• Quasi alignment-free application due to automatic
adjustment of channel separation via I2C-bus
• Dbx noise reduction circuit
• Dbx decoded stereo, Second Audio Program (SAP) or
mono selectable at the AF outputs
GENERAL DESCRIPTION
• Additional SAP output without dbx, including
de-emphasis
The TDA9850 is a bipolar-integrated BTSC stereo/SAP
decoder (I2C-bus controlled) for application in TV sets,
VCRs and multimedia.
• High integration level with automatically tuned
integrated filters
• Input level adjustment I2C-bus controlled
• Alignment-free SAP processing
• Stereo pilot PLL circuit with ceramic resonator,
automatic adjustment procedure for stereo channel
separation, two pilot thresholds selectable via I2C-bus
• Automatic pilot cancellation
• Composite input noise detector with I2C-bus selectable
thresholds for stereo and SAP off
• I2C-bus transceiver.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
supply voltage
supply current
CONDITIONS
MIN.
8.5
TYP. MAX. UNIT
VCC
ICC
9
9.5
75
−
V
−
58
mA
mV
mV
Vcomp(rms) input signal voltage (RMS value) 100% modulation L + R; fi = 300 Hz −
VoR(rms) output signal voltage (RMS value) 100% modulation L + R; fi = 300 Hz −
VoL(rms)
250
500
;
−
GLA
input level adjustment control
stereo channel separation
total harmonic distortion L + R
signal-to-noise ratio
−3.5
−
+4.0
−
dB
dB
%
αcs
fL = 300 Hz; fR = 3 kHz
fi = 1 kHz
25
35
0.2
THDL,R
S/N
−
−
500 mV (RMS) mono output signal
CCIR noise weighting filter
(peak value)
−
−
60
73
−
−
dB
DIN noise weighting filter
(RMS value)
dBA
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA9850
SDIP32
SO32
plastic shrink dual in-line package; 32 leads (400 mil)
plastic small outline package; 32 leads; body width 7.5 mm
SOT232-1
SOT287-1
TDA9850T
1995 Jun 19
2