Philips Semiconductors
Preliminary specification
TV and VTR stereo/dual sound processor
with digital identification
TDA9845
The identification signal is amplified and fed through an
AGC low-pass filter with external capacitor CAGC (pin 3) to
obtain the AGC voltage for controlling the gain of the pilot
signal amplifier.
FUNCTIONAL DESCRIPTION
AF signal handling
The input AF signals, derived from the two sound carriers,
are processed in analog form using operational amplifiers.
Dematrixing uses the technique of two amplifiers
processing the AF signals. Finally, a source selector
provides the facility to route the mono signal through to the
outputs (‘forced mono’).
The identification stages consist of two digital PLL circuits
with digital synchronous demodulation and digital
integrators to generate the stereo or dual sound
identification bits which can be indicated via LEDs.
A 10 MHz crystal oscillator provides the reference clock
frequency. The corresponding detection bandwidth is
larger than ±50 Hz for the pilot carrier signal, so that
fp-variations from the transmitter can be tracked in the
event of missing synchronization with the horizontal
frequency fH. However the detection bandwidth for the
identification signal is made small (±1 Hz) to reduce
mis-identification.
De-emphasis is performed by two RC low-pass filter
networks with internal resistors and external capacitors.
This provides a frequency response with the tolerances
given in Fig.4.
A source selector, controlled via the control input ports
allows selection of the different modes of operation in
accordance with the transmitted signal. The device was
designed for a nominal input signal (FM: 54% modulation
is equivalent to ∆f = ±27 kHz) of 250 mV RMS (Vi 1, Vi 2)
and for a nominal input signal (AM: m = 0.54) of 500 mV
RMS (Vi 1), respectively 250 mV RMS (Vi 3). A nominal
gain of 6 dB for Vi 1 and Vi 2 signals (0 dB for Vi 1 signal
(AM sound)) and 6 dB for Vi 3 signal is built-in. By using
rail-to-rail operational amplifiers, the clipping level
(THD ≤1.5%) is 1.60 V RMS for VP = 5 V and 2.65 V RMS
for VP = 8 V at outputs Vo 1, Vo 2. Care has been taken to
minimize switching plops. Also total harmonic distortion
and random noise are considerably reduced.
Figure 2 shows an example of the alignment-free fp
band-pass filter. To achieve the required QL of around 12,
the Q0 at fp of the coil was chosen to be around 25
(effective Q0 including PCB influence). Using coils with
other Q0, the RC-network (RFP, CFP) has to be adapted
accordingly. It is assumed that the loss factor tanδ of the
resonance capacitor is ≤0.01 at fp.
Copper areas under the coil might influence the loaded Q
and have to be taken into account. Care has also to be
taken in environments with strong magnetic fields when
using coils without magnetic shielding.
Identification
Control input ports
The pilot signal is fed via an external RC high-pass filter
and single tuned LC band-pass filter to the input of a gain
controlled amplifier. The external LC band-pass filter in
combination with the external RC high-pass filter should
have a loaded Q-factor of approximately 40 to 50 to
ensure the highest identification sensitivity. By using a
fixed coil (±5%) to save the alignment (see Fig.2), a
Q-factor of approximately 12 is proposed. This may cause
a loss in sensitivity of approximately 2 to 3 dB. A digital
PLL circuit generates a reference carrier, which is
synchronized with the pilot carrier. This reference carrier
and the gain controlled pilot signal are fed to the
AM-synchronous demodulator. The demodulator detects
the identification signal, which is fed through a low-pass
filter with external capacitor CLP (pin 4) to a Schmitt-trigger
for pulse shaping and suppression of low level spurious
signal components. This is a measure against
The complete IC is controlled by the three control input
ports C1, C2 and C3 (TTL-level). With these ports the user
can select between different AF sources according to the
transmitter status (see Table 1). Finally Schmitt-triggers
are added in the input port interfaces to suppress spikes
from the control lines C1, C2 and C3.
After a power-on reset, the logic is reset (mute mode for
the AF channel). After some time (≤1 ms), when the
power-on reset is automatically deactivated, the switch
position of the Main channel is changed according to the
control input port levels C1, C2 and C3.
For standard L, the AM sound is fed via the AF input (Vi 1)
to the two AF outputs (Vo 1,Vo 2). This can also be
achieved by feeding at AF input Vi 3.
The logic level combination 111 of the control input ports
(C3, C2 and C1) is not allowed (see Table 1).
mis-identification.
1995 Mar 20
6
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