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TCA6424ARSMR

更新时间： 2024-09-28 06:15:47
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
33页 540K
描述
LOW-VOLTAGE 24-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT RESET AND CONFIGURATION REGISTERS

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中文翻译

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TCA6424ARSMR 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：32
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.79
JESD-30 代码：S-XQCC-N32长度：5 mm
I/O 线路数量：24端口数量：3
端子数量：32最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER认证状态：Not Qualified
座面最大高度：0.6 mm最大供电电压：5.5 V
最小供电电压：1.65 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：5 mmuPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：1

TCA6424ARSMR 数据手册

 浏览型号TCA6424ARSMR的Datasheet PDF文件第2页浏览型号TCA6424ARSMR的Datasheet PDF文件第3页浏览型号TCA6424ARSMR的Datasheet PDF文件第4页浏览型号TCA6424ARSMR的Datasheet PDF文件第5页浏览型号TCA6424ARSMR的Datasheet PDF文件第6页浏览型号TCA6424ARSMR的Datasheet PDF文件第7页 
TCA6424A  
www.ti.com  
SCPS193B –JULY 2010–REVISED SEPTEMBER 2010  
LOW-VOLTAGE 24-BIT I2C AND SMBus I/O EXPANDER  
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS  
Check for Samples: TCA6424A  
1
FEATURES  
•
Operating Power-Supply Voltage Range of  
1.65 V to 5.5 V  
•
•
•
Polarity Inversion Register  
Internal Power-On Reset  
•
Allows Bidirectional Voltage-Level Translation  
and GPIO Expansion Between:  
Power Up With All Channels Configured as  
Inputs  
–
–
–
–
1.8-V SCL/SDA and  
1.8-V, 2.5-V, 3.3-V, or 5-V P Port  
•
•
•
No Glitch On Power Up  
Noise Filter on SCL/SDA Inputs  
2.5-V SCL/SDA and  
1.8-V, 2.5-V, 3.3-V, or 5-V P Port  
Latched Outputs With High-Current Drive  
Maximum Capability for Directly Driving LEDs  
3.3-V SCL/SDA and  
1.8-V, 2.5-V, 3.3-V, or 5-V P Port  
•
•
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
5-V SCL/SDA and  
1.8-V, 2.5-V, 3.3-V, or 5-V P Port  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
•
•
•
I2C to Parallel Port Expander  
Low Standby Current Consumption of 1 mA  
1000-V Charged-Device Model (C101)  
Schmitt-Trigger Action Allows Slow Input  
Transition and Better Switching Noise  
Immunity at the SCL and SDA Inputs  
RGJ/RSM PACKAGE  
(BOTTOM VIEW)  
–
–
–
–
Vhys = 0.18 V Typ at 1.8 V  
Vhys = 0.25 V Typ at 2.5 V  
Vhys = 0.33 V Typ at 3.3 V  
Vhys = 0.5 V Typ at 5 V  
32  
31  
30  
29  
28  
27  
26  
25  
9
P10  
P11  
P12  
P13  
P14  
P15  
P16  
P17  
INT  
V
10  
11  
12  
13  
14  
15  
16  
CCI  
SDA  
•
•
•
•
•
5-V Tolerant I/O Ports  
SCL  
Exposed  
Center Pad  
Active-Low Reset Input (RESET)  
Open-Drain Active-Low Interrupt Output (INT)  
400-kHz Fast I2C Bus  
RESET  
V
CCP  
ADDR  
GND  
Input/Output Configuration Register  
If used, the exposed center pad must be  
connected as a secondary ground or left  
electrically open.  
DESCRIPTION/ORDERING INFORMATION  
This 24-bit I/O expander for the two-line bidirectional bus (I2C) is designed to provide general-purpose remote I/O  
expansion for most microcontroller families via the I2C interface [serial clock (SCL) and serial data (SDA)].  
The major benefit of this device is its wide VCC range. It can operate from 1.65 V to 5.5 V on the P-port side and  
on the SDA/SCL side. This allows the TCA6424A to interface with next-generation microprocessors and  
microcontrollers on the SDA/SCL side, where supply levels are dropping down to conserve power. In contrast to  
the dropping power supplies of microprocessors and microcontrollers, some PCB components, such as LEDs,  
remain at a 5-V power supply.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2010, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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