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T90FJR-5VV PDF预览

T90FJR-5VV

更新时间: 2024-09-23 15:53:43
品牌 Logo 应用领域
爱特美尔 - ATMEL ATM异步传输模式商用集成电路
页数 文件大小 规格书
41页 605K
描述
Consumer Circuit, PQFP128, PLASTIC, VQFP-128

T90FJR-5VV 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:FQFP,
针数:128Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.24
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:R-PQFP-G128
长度:20 mm湿度敏感等级:1
功能数量:1端子数量:128
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:RECTANGULAR封装形式:FLATPACK, FINE PITCH
峰值回流温度(摄氏度):225认证状态:Not Qualified
座面最大高度:3.4 mm最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V表面贴装:YES
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
Base Number Matches:1

T90FJR-5VV 数据手册

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Features  
Module Interface  
– 2 full independent module capability  
– Common Interface Standard compliant  
DVB_CI (CENELEC EN-50221)  
NRSS-B (SCTE IS-679 Part B)  
DAVIC v1.2 (CA0 interface)  
– Memory PCMCIA compliance (R2)  
8-bit data access  
26-bit address Memory Card  
– Attribute Memory access (CIS, Tupple)  
– High speed capability  
Up to 20Mbits/s on Command Interface  
Up to 100Mbits/s on Transport Stream  
– Polling and Interrupt modes  
– Hot Insertion (Automatic and Reset VCC handling)  
– 3.3V or 5V I/O buffers  
Dual Common  
Interface  
Hardware  
Controller-  
CIMax™  
PQFP 128 package  
Host microprocessor Interface  
Universal Control Signal Generator (UCSG)  
PC Card control signals generation  
Supports PowerPC, ARM, ST20, 68xxx, TMS, LSI 64008, TC81220F, IDTR3041 host  
microprocessors  
I2C port  
CIMaXSet-up  
Slot selection  
T90FJR  
Cascade mode management (up to 4 CIMaX)  
Chip Select bank and Interrupt facilities  
3.3V or 5V I/O buffers  
Digital Video Stream Interface  
MPEG II Transport Stream compliant  
3.3V or 5V I/O buffer for direct interface with FEC and DEMUX ICs  
Description  
The T90FJR, also called CIMaXcontroller is the hardware extension of SCM Micro-  
systemssecond generation Common Interface integration package (CI Pack+). It  
enables CI Driver software to directly address two complete independent Common  
Interface modules.  
As such, it contributes to offer an optimized, homogeneous and complete solution for  
digital TV receiver manufacturer that wants quickly to implement the Common  
Interface.  
CIMaXincludes the necessary I/Os to interface the MPEG Transport stream gener-  
ated by the receiver demodulator and to daisy chain it through two modules and back  
it to the demultiplexer. Voltage level translators allow to avoid any additional  
component.  
CIMaXinterfaces with major digital TV receiver microprocessors. An I2C bus is  
used for initialization and module selection, while a Universal Control Signal Genera-  
tor (UCSG)maps CPU control bus into Command Interface control signals. To  
minimize pin count, host address and data buses transit through external buffers that  
are driven by CIMaX.  
CIMaXincludes a memory mode that allows to use any of the two Common inter-  
face slots to read/write a 8-bit PC Card Memory card. This feature gives the receiver  
memory extension capability for software upgrade or better performance.  
Rev. A – 7-Sep-01  
1

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