Datasheet > SY89321L_08

SY89321L_08

更新时间： 2024-09-30 07:20:11

品牌	Logo	应用领域
麦瑞 - MICREL		/
页数	文件大小	规格书
5页	48K
描述
3.3V DIFFERENTIAL LVPECL/CML/LVDS-to-LVTTL

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数据手册

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SY89321L_08 数据手册

Precision Edge^®

3.3V DIFFERENTIAL

LVPECL/CML/LVDS-to-LVTTL

TRANSLATOR

SY89321L

Micrel, Inc.

Precision Edge

SY89321L

FEATURES

■ 3.3V power supply

Precision Edge

■ 1.9ns typical propagation delay

■ 275MHz f

MAX

DESCRIPTION

■ Differential LVPECL/CML/LVDS inputs

■ 24mA LVTTL outputs

The SY89321L is a differential LVPECL/CML/LVDS-

to-LVTTL translator requiring only a single +3.3V power.

The SY89321L is functionally equivalent to the

■ Flow-through pinouts

■ Internal input resistors: pulldown on IN, pulldown

and pullup on /IN

SY100EPT21L, but in an ultra-small 8-pin MLF package

that features a 70% smaller footprint. This ultra-small

package and low skew single gate design make the

SY89321L ideal for applications that require the translation

of a clock or data signal where minimal space, low power

and low cost are critical.

■ Q output will default LOW with inputs open

■ V output

■ Available in ultra-small 8-pin MLF (2mm x 2mm)

package

allows a differential, single-ended, or AC-coupled

interface to the device. If used, the V output should be

bypassed to V

with 0.01µF capacitor.

Under open input conditions, the /IN will be biased at

a V /2 voltage level and the IN input will be pulled to

ground. This condition will force the Q output low to

provide added stability.

BLOCK DIAGRAM

The SY89321L is compatible with positive ECL 100k

logic levels.

LVPECL/

CML/LVDS

LVTTL

/IN

Precision Edge is a registered trademark of Micrel, Inc.

MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.

Rev.: D

Amendment: /0

M9999-060208

hbwhelp@micrel.com or (408) 955-1690

Issue Date: June 2008

12 3 4 5

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