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SY10ELT21ZGTR

更新时间： 2024-09-30 05:04:27

品牌	Logo	应用领域
麦瑞 - MICREL		/
页数	文件大小	规格书
5页	80K
描述
DIFFERENTIAL PECL-to-TTL TRANSLATOR

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中文翻译

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数据手册

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SY10ELT21ZGTR 数据手册

Precison Edge^®

Precision^SE^Y1d⁰g^Ee^LT^®²¹

DIFFERENTIAL

PECL-to-TTL

TRANSLATOR

Micrel, Inc.

SY100ELT21

SY10ELT21

SY100ELT21

FEATURES

2.5ns typical propagation delay

Low power

Precision Edge

Differential PECL inputs

24mA TTL outputs

DESCRIPTION

Flow-through pinouts

Available in 8-pin SOIC package

The SY10/100ELT21 are single differential PECL-to-

TTL translators. Because PECL (Positive ECL) levels are

used, only +5V and ground are required. The small outline

8-lead SOIC package and low skew single gate design

make the ELT21 ideal for applications that require the

translation of a clock or data signal where minimal space,

low power, and low cost are critical.

The V output allow differential single-ended, or AC-

coupled interface to the device. If used, the V

output

should be bypassed to V

with a 0.01µF capacitor.

The ELT21 is available in both ECL standards: the

10ELT is compatible with positive ECL 10H logic levels,

while the 100ELT is compatible with positive ECL 100K

logic levels.

PIN NAMES

Function

TTL Output

D, /D

V_CC

V_BB

GND

Differential PECL Inputs

+5.0V Supply

Reference Output

Ground

Precision Edge is a registered trademark of Micrel, Inc.

Rev.:

Amendment: /0

M9999-031506

hbwhelp@micrel.com or (408) 955-1690

Issue Date: March 2006

12 3 4 5

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