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SY10ELT22ZG PDF预览

SY10ELT22ZG

更新时间: 2024-09-30 20:41:31
品牌 Logo 应用领域
美国微芯 - MICROCHIP 光电二极管输出元件接口集成电路锁存器
页数 文件大小 规格书
5页 59K
描述
DUAL TTL/CMOS TO PECL TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO8

SY10ELT22ZG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.04最大延迟:0.6 ns
接口集成电路类型:TTL/CMOS TO PECL TRANSLATORJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.93 mm
湿度敏感等级:3位数:1
功能数量:2端子数量:8
输出锁存器或寄存器:NONE输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.73 mm最大供电电压:5.5 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:ECL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.94 mm
Base Number Matches:1

SY10ELT22ZG 数据手册

 浏览型号SY10ELT22ZG的Datasheet PDF文件第2页浏览型号SY10ELT22ZG的Datasheet PDF文件第3页浏览型号SY10ELT22ZG的Datasheet PDF文件第4页浏览型号SY10ELT22ZG的Datasheet PDF文件第5页 
2  
SY10ELT22
SY100ELT22  
DUAL TTL-to-DIFFERENTIAL  
PECL TRANSLATOR  
FEATURES  
DESCRIPTION  
300ps typical propagation delay  
<100ps output-to-output skew  
Differential PECL outputs  
The SY10/100ELT22 are dual TTL-to-differential PECL  
translators. Because PECL (Positive ECL) levels are  
used, only +5V and ground are required. The small outline  
8-lead SOIC package and the low skew, dual gate design  
of the ELT22 makes it ideal for applications which require  
the tranlation of a clock and a data signal.  
PNP TTL inputs for minimal loading  
Flow-through pinouts  
The ELT22 is available in both ECL standards: the  
10ELT is compatible with positive ECL 10H logic levels,  
while the 100ELT is compatible with positive ECL 100K  
logic levels.  
Available in 8-pin SOIC package  
PIN NAMES  
Pin  
Function  
Differential PECL Outputs  
TTL Inputs  
Qn  
Dn  
VCC  
GND  
+5.0V Supply  
Ground  
Rev.: H  
Amendment: /0  
M9999-052108  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: May 2008  

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