Datasheet > SW-212

SW-212

更新时间： 2024-09-21 12:20:39

品牌	Logo	应用领域
泰科 - TE		开关射频微波驱动衰减器
页数	文件大小	规格书
4页	87K
描述
Drivers for GaAs FET Switches and Digital Attenuators

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SW-212 技术参数

生命周期：	Transferred	Reach Compliance Code：	unknown
风险等级：	5.19	特性阻抗：	50 Ω
构造：	COMPONENT	最大插入损耗：	1 dB
最大工作频率：	3000 MHz	最小工作频率：
最高工作温度：	85 °C	最低工作温度：	-55 °C
射频/微波设备类型：	SPST	最大电压驻波比：	1.8
Base Number Matches：	1

SW-212 数据手册

Application Note

S2079

Drivers for GaAs FET Switches and Digital Attenuators

Rev. V5

Figure 2 shows a 3-bit digital attenuator. Applying the

correct bias voltage and its complement to any stage

switches the pad for that stage into the RF signal path.

Introduction

Many of M/A-COM's GaAs FET switches and digital

attenuators cannot operate directly with simple TTL or

CMOS logic, but instead require external circuits to

provide appropriate control voltages. This application

note, an update of M539, Drivers for GaAs FET MMIC

Switches and Digital Attenuators, provides information

on M/A-COM's SW-109 and SWD-119 drivers and

other commercially available digital logic IC's for control

of switches and digital attenuators.

RF Common

RF2

RF1

GaAs FET’s

GaAs MMIC control devices such as switches and

digital attenuators typically employ Field Effect

Transistors (FET’s). The most common FET is the n-

channel depletion mode device, which has low source-

to-drain resistance in the absence of a gate bias, and

allows a current IDSS to flow. With the application of a

negative gate bias voltage, the electric field below the

gate causes the conduction channel to narrow,

increasing the source-to-drain resistance. The gate

voltage that creates a high enough resistance to reduce

the source-to-drain current to (typically) 1 - 2 percent of

IDSS is known as the pinch-off voltage. For M/A-COM

FET’s,. the pinch-off voltage is typically –2.5 volts. If

the transistor is biased at the extremes, (0 V and –5 V

typically), on and off switching results, providing the

basis for both GaAs MMIC switches and digital

attenuators.

Control

"A"

Control

"B"

Dual Control Switch Truth Table

Control A Control B RF Common

to RF1

RF Common

to RF2

-5 V

0 V

Off

-5 V

Typical complementary logic control voltages:

Logic low

Logic high

0 V to –2 V @ 20 μA max.

-5 V to 40 μA typ. To –8 V @ 200 μ

A max.

Switch Circuit Topology

In switches, FET's are arranged in both series and

shunt configurations. The series FET's provide a

through-path for the on state, while the shunt FET's

provide isolation for the off state. The operation of the

switch requires that series FET's and shunt FET's

associated with each switch state have opposite (or

complementary) conduction states and therefore

Figure 1: Typical Dual Control Switch (SW-239, etc)

VC1

VC2

VC3

RF 2

RF 1

opposite (or complementary) gate biases.

For

8 dB

Pad

4 dB

Pad

16 dB

Pad

example, Figure 1 illustrates the operation of a typical

dual control SPST GaAs MMIC switch. If the RF to

RF1 path is on and the RF to RF2 path is off, then

FET's Q2 and Q4 are biased on, while Q1 and Q3 are

biased off.

Figure 2: Digital Attenuator Based on Switched Pads

(AT-230)

Digital attenuators use series/shunt stages with circuit

components that form fixed attenuator pads,

corresponding to digital attenuation bits, switched in or

out of the transmission path, either individually or in

combination. Switches require complementary bias

voltages for each state, while digital attenuators require

complementary bias voltage to activate each bit.

• North America Tel: 800.366.2266 • Europe Tel: +353.21.244.6400

Visit www.macomtech.com for additional data sheets and product information.

• India Tel: +91.80.4155721

• China Tel: +86.21.2407.1588

M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make

changes to the product(s) or information contained herein without notice.

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