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STR755FR0

更新时间： 2024-01-27 13:35:31
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意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
81页 1920K
描述
ARM7TDMI-S⑩ 32-bit MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN

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STR755FR0 数据手册

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STR750Fxx STR751Fxx  
STR752Fxx STR755Fxx  
ARM7TDMI-S™ 32-bit MCU with Flash, SMI, 3 std 16-bit timers,  
PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN  
Features  
■ Core  
– ARM7TDMI-S 32-bit RISC CPU  
– 54 DMIPS @ 60 MHz  
LQFP64 10x10 mm LQFP100 14 x 14 mm  
■ Memories  
– Up to 256 KB Flash program memory (10k  
W/E cycles, retention 20 yrs @ 85°C)  
– 16 KB Read-While-Write Flash for data  
(100k W/E cycles, retention 20 yrs@ 85°C)  
– Flash Data Readout and Write Protection  
– 16KBytes embedded high speed SRAM  
LFBGA64  
8 x 8 x 1.7 mm  
LFBGA100  
10 x 10 x 1.7 mm  
– 16-bit 6-ch. synchronizable PWM timer  
– Memory mapped interface (SMI) to ext.  
Serial Flash (64 MB) w. boot capability  
– Dead time generation, edge/center-aligned  
waveforms and emergency stop  
■ Clock, Reset and Supply Management  
– Single supply 3.3V 10% or 5V 10%  
– Embedded 1.8V Voltage Regulators  
– Int. RC for fast start-up and backup clock  
– Ideal for induction/brushless DC motors  
■ 8 Communications Interfaces  
2
– 1 I C interface  
– 3 HiSpeed UARTs w. Modem/LIN capability  
– 2 SSP interfaces (SPI or SSI) up to 16 Mb/s  
– 1 CAN interface (2.0B Active)  
– Up to 60 MHz operation using internal PLL  
with 4 or 8 MHz crystal/ceramic osc.  
– Smart Low Power Modes: SLOW, WFI,  
STOP and STANDBY with backup registers  
– 1 USB full-speed 12 Mb/s interface with 8  
configurable endpoint sizes  
– Real Time Clock, driven by low power  
internal RC or 32.768 kHz dedicated osc,  
for clock-calendar and Auto Wake-up  
■ 10-bit A/D Converter  
– 16/11 chan. with prog. Scan Mode & FIFO  
– Programmable Analog Watchdog feature  
– Conversion time: min. 3.75 µs  
■ Nested interrupt controller  
– Fast interrupt handling with 32 vectors  
– 16 IRQ priorities, 2 maskable FIQ sources  
– 16 external interrupt / wake-up lines  
– Start conversion can be triggered by timers  
■ Up to 72/38 I/O ports  
– 72/38 GPIOs with High Sink capabilities  
– Atomic bit SET and RES operations  
■ DMA  
– 4-channel DMA controller  
– Circular buffer management  
– Support for UART, SSP, Timers, ADC  
Table 1.  
Device summary  
Root part number  
Reference  
■ 6 Timers  
STR750Fxx STR750FV0, STR750FV1, STR750FV2  
STR751Fxx STR751FR0, STR751FR1, STR751FR2  
STR752Fxx STR752FR0, STR752FR1, STR752FR2  
– 16-bit watchdog timer (WDG)  
– 16-bit timer for system timebase functions  
– 3 synchronizable timers each with up to 2  
input captures and 2 output  
compare/PWMs.  
STR755FR0, STR755FR1, STR755FR2  
STR755Fxx  
STR755FV0, STR755FV1, STR755FV2  
July 2007  
Rev 3  
1/81  
www.st.com  
1
1234567...81

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