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STLC5048TR PDF预览

STLC5048TR

更新时间: 2024-01-09 18:58:48
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 电信电信集成电路
页数 文件大小 规格书
64页 550K
描述
A/MU-LAW, PROGRAMMABLE CODEC, PQFP64, 10 X 10 MM, 1.40 MM HEIGHT, TQFP-64

STLC5048TR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFP包装说明:10 X 10 MM, 1.40 MM HEIGHT, TQFP-64
针数:64Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.82
压伸定律:A/MU-LAW滤波器:YES
最大增益公差:0.15 dBJESD-30 代码:S-PQFP-G64
JESD-609代码:e4长度:10 mm
线性编码:16-BIT功能数量:1
端子数量:64工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm子类别:Codecs
最大压摆率:0.07 mA标称供电电压:3.3 V
表面贴装:YES电信集成电路类型:PROGRAMMABLE CODEC
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmBase Number Matches:1

STLC5048TR 数据手册

 浏览型号STLC5048TR的Datasheet PDF文件第2页浏览型号STLC5048TR的Datasheet PDF文件第3页浏览型号STLC5048TR的Datasheet PDF文件第4页浏览型号STLC5048TR的Datasheet PDF文件第5页浏览型号STLC5048TR的Datasheet PDF文件第6页浏览型号STLC5048TR的Datasheet PDF文件第7页 
STLC5048  
Fully programmable four-channel codec and filter  
Features  
Fully programmable monolithic 4-channel  
codec/filter  
Single +3.3 V supply  
TQFP64 (10x10x1.4mm)  
A/m law programmable  
Linear coding (16 bits) option  
Description  
PCM highway format automatically detected:  
1.536 or 1.544 MHz, 2.048, 4.096, 8192 MHz  
The STLC5048 is a monolithic fully programmable  
4-channel codec and filter. It operates with a  
single +3.3V supply.  
Two PCM ports available  
TX gain programming: 33 dB range; <0.01 dB  
step  
The analog interface is based on a receive output  
buffer driving the SLIC RX nput and on an  
amplifier input stage ormally driven by the SLIC  
TX output. Due to the single supply voltage a mid-  
supply referenclevel is generated internally by  
the device nd all analog signals are referred to  
this lev(AGND). The PCM interface uses one  
common 8 kHz frame sync. pulse for transmit and  
reive direction. The bit clock is automatically  
detected between four standards:  
RX gain programming: 42 dB range; <0.01 dB  
step  
Programmable SLIC input impedance  
Programmable transhybrid balance filter  
Programmable equalization (frequency  
response)  
Programmable time slot assignment  
Digital and analog loopbacks  
1.563/1.544 MHz, 2.048 MHz, 4.096 MHz,  
8192 MHz.  
SLIC control port static (16 I/Os),  
dynamic (12 I/Os + 4 CS)  
Two PCM port are provided: the channels can be  
connected to port A or/and B.  
Built-in test mode with tone generation, MCU  
access to PCM data  
64 TQFP (10x10mm) packge  
Device programmability is achieved by means of  
several registers and commands allowing to set  
the different parameters like TX/RX gains, line  
impedance, transhybrid balance, equalization  
(frequency response), encoding law (A/m), time  
slot assignment, independent channels power  
up/down, loopbacks, PCM bits offset.  
Programmable SC line current limitation  
Programmable SLIC off-hook detection  
threshold  
The STLC5048 can be programmed via serial  
interface running up to 8 MHz. One interrupt  
output pin is also provided.  
A GUI interface is also available to emulate and  
program the coefficients for impedance synthesis,  
echo cancelling and channel filtering.  
November 2007  
Rev 9  
1/64  
www.st.com  
64  

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