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STK20C04-WF45 PDF预览

STK20C04-WF45

更新时间: 2024-09-24 04:01:47
品牌 Logo 应用领域
SIMTEK 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
12页 431K
描述
512 x 8 nvSRAM QuantumTrap⑩ CMOS Nonvolatile Static RAM

STK20C04-WF45 数据手册

 浏览型号STK20C04-WF45的Datasheet PDF文件第2页浏览型号STK20C04-WF45的Datasheet PDF文件第3页浏览型号STK20C04-WF45的Datasheet PDF文件第4页浏览型号STK20C04-WF45的Datasheet PDF文件第5页浏览型号STK20C04-WF45的Datasheet PDF文件第6页浏览型号STK20C04-WF45的Datasheet PDF文件第7页 
STK20C04  
512 x 8 nvSRAM  
QuantumTrap™ CMOS  
Nonvolatile Static RAM  
Obsolete - Not Recommend for new Designs  
FEATURES  
DESCRIPTION  
• 25ns, 35ns and 45ns Access Times  
STORE to Nonvolatile Elements Initiated by  
Hardware  
RECALL to SRAM Initiated by Hardware or  
Power Restore  
• Automatic STORE Timing  
• 10mA Typical ICC at 200ns Cycle Time  
• Unlimited READ, WRITE and RECALL Cycles  
• 1,000,000 STORE Cycles to Nonvolatile Ele-  
ments  
• 100-Year Data Retention over Full Industrial  
Temperature Range  
• Commercial and Industrial Temperatures  
The Simtek STK20C04 is a fast static RAM with a non-  
volatile element incorporated in each static memory  
cell. The SRAM can be read and written an unlimited  
number of times, while independent nonvolatile data  
resides in nonvolatile elements. Data may easily be  
transferred from the SRAM to the Nonvolatile Elements  
(the STORE operation), or from the Nonvolatile Ele-  
ments to the SRAM (the RECALL operation), using the  
NE pin. Transfers from the Nonvolatile Elements to the  
SRAM (the RECALL operation) also take place auto-  
matically on restoration of power. The STK20C04  
combines the high performance and ease of use of a  
fast SRAM with nonvolatile data integrity.  
The STK20C04 features industry-standard pinout for  
nonvolatile RAMs in a 28-pin 600 mil plastic DIP.  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
1
NE  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
CC  
W
NC  
2
Quantum Trap  
16 x 256  
NC  
3
A
A
A
A
A
7
4
A
6
5
4
3
2
8
5
NC  
NC  
G
NC  
E
6
STORE  
7
A
A
A
A
5
6
7
8
8
A
9
A
STATIC RAM  
ARRAY  
1
0
RECALL  
10  
11  
12  
13  
14  
A
DQ  
DQ  
7
6
5
DQ  
0
16 x 256  
DQ  
DQ  
1
2
DQ  
DQ  
DQ  
4
3
V
SS  
28 - 600 PDIP  
PIN NAMES  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
COLUMN I/O  
STORE/  
RECALL  
CONTROL  
A
- A  
Address Inputs  
Write Enable  
Data In/Out  
0
8
COLUMN DEC  
W
DQ - DQ  
0
7
E
Chip Enable  
Output Enable  
Nonvolatile Enable  
Power (+ 5V)  
Ground  
DQ5  
DQ6  
DQ7  
A3 A4  
A0 A1 A2  
G
NE  
G
NE  
E
V
V
CC  
W
SS  
March 2006  
1
Document Control # ML0001 rev 0.2  

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