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ST72F324K6T5/XXX

更新时间： 2024-09-25 10:51:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 微控制器
页数 文件大小 规格书
176页 939K
描述
IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,32PIN,PLASTIC

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ST72F324K6T5/XXX 技术参数

是否Rohs认证： 符合生命周期：Obsolete
Reach Compliance Code：compliant风险等级：5.84
位大小：8CPU系列：ST72
JESD-30 代码：S-PQFP-G32JESD-609代码：e4
端子数量：32最高工作温度：85 °C
最低工作温度：-10 °C封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP32,.35SQ,32
封装形状：SQUARE封装形式：FLATPACK
电源：3.3/5 V认证状态：Not Qualified
RAM（字节）：1024ROM（单词）：32768
ROM可编程性：FLASH速度：8 MHz
子类别：Microcontrollers最大压摆率：8 mA
表面贴装：YES技术：CMOS
温度等级：OTHER端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD

ST72F324K6T5/XXX 数据手册

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ST72321J, ST72324J/K  
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,  
2
FIVE TIMERS, SPI, SCI, I C INTERFACE  
PRODUCT PREVIEW  
■ Memories  
– 8 to 60K dual voltage High Density Flash (HD-  
Flash) or ROM with read-out protection capa-  
bility. In-Application Programming and In-  
Circuit Programming for HDFlash devices  
– 384 to 2K bytes RAM  
TQFP32  
7 x 7  
TQFP44  
10 x 10  
■ Clock, Reset And Supply Management  
– Enhanced reset system  
– Enhanced low voltage supervisor (LVD) for  
main supply with 3 programmable reset  
thresholds and auxiliary voltage detector  
(AVD) with interrupt capability  
– Clock sources: crystal/ceramic resonator os-  
cillators or RC oscillator with PLL and by-pass  
for external clock, clock security system.  
SDIP32  
200 mil  
SDIP42  
600 mil  
– Four Power Saving Modes: Halt, Active-Halt,  
Wait and Slow  
■ Interrupt Management  
■ 3 Communication Interfaces  
– SPI synchronous serial interface  
– SCI asynchronous serial interface  
– I C multimaster interface  
– Nested interrupt controller  
– 10 interrupt vectors plus TRAP and RESET  
– 9/6 external interrupt lines (on 4 vectors)  
■ Up to 32 I/O Ports  
2
■ 1 Analog Peripheral  
– 10-bit ADC with 12 input pins  
– 32/24 multifunctional bidirectional I/O lines  
– 22/17 alternate function lines  
– 12/10 high sink outputs  
■ Instruction Set  
■ 5 Timers  
– 8-bit Data Manipulation  
– 63 Basic Instructions  
– 17 main Addressing Modes  
– 8 x 8 Unsigned Multiply Instruction  
– True Bit Manipulation  
– Main Clock Controller with: Real time base,  
Beep and Clock-out capabilities  
– Configurable watchdog timer  
– Two 16-bittimers with: 2 input captures, 2 out-  
put compares, external clock input on one tim-  
er, PWM and pulse generator modes  
■ Development Tools  
– 8-bit PWMAuto-reload timer with: 4 PWM out-  
puts, output compare and time base interrupt,  
external clock with event detector  
– Full hardware/software development package  
– In-Circuit Testing capability  
Device Summary  
Features  
Program memory - bytes  
RAM (stack) - bytes  
ST72(F)321J9  
60K  
ST72(F)321J7  
48K  
ST72(F)324(J/K)6 ST72(F)324(J/K)4  
ST72324(J/K)2  
8K  
32K  
16K  
2K (256)  
1536 (256)  
1024 (256)  
512 (256)  
384 (256)  
Watchdog, 16-bit Timers, SPI, SCI, ADC  
-
Peripherals  
2
PWM ART, I C  
-
-
Operating  
FLASH: 2.7 to 5.5V with f  
≤4MHz or 3.85V to 5.5V with f  
≤8MHz  
CPU  
ROM: 2.7 to 5.5V  
CPU  
Supply vs. Frequency  
ROM: 2.7 to 5.5V with f  
≤8MHz  
with f  
≤8MHz  
CPU  
CPU  
Temperature Range  
0°C to 70°C / -10°C to +85 °C / -40°C to +85 °C / -40°C to +105°C / -40°C to +125°C  
SDIP42 (JxB), TQFP44 10x10 (JxT),  
TQFP44 10x10 (JxT)  
Packages  
SDIP32 (KxB), TQFP32 7x7 (KxT)  
Rev. 1.3  
1/176  
February 2001  
This ispreliminary information on a new product in development or undergoing evaluation. Details aresubject to change without notice.  
1
1234567...176

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