ST52F510/F513/F514
1 GENERAL DESCRIPTION
1.1 Introduction
ST52F510/F513/F514 are devices of ST FIVE
family of 8-bit Intelligent Controller Units (ICU),
which can perform, both boolean and Fuzzy
algorithms in an efficient manner, in order to reach
the best performances that the two methodologies
allow.
An internal programmable WATCHDOG is
available to avoid loop errors and reset the ICU.
ST52F510/F513/F514 includes a 10-bit, self-
calibrating, Analog to Digital Converter with an 8-
analog channel Multiplexer. Single/Multiple
channels and Single/Sequence conversion modes
are supported. External reference can be supplied
to obtain more stability and precision in the
conversion.
Produced by STMicroelectronics using the reliable
high performance CMOS process for Single
Voltage Flash versions, ST52F510/F513/F514
include integrated on-chip peripherals that allow
maximization of system reliability, and decreased
system costs in order to minimize the number of
external components.
The flexible I/O configuration of ST52F510/F513/
F514 allow one to interface with a wide range of
external devices (for example D/A converters or
power control devices), and to communicate with
the most common serial standards.
ST52F510/F513/F514 pins are configurable. The
user can set input or output signals on each single
pin in 8 different modes, reducing the need for
external components in order to supply a suitable
interface with the port pins.
ST52F510/F513/F514 supply different peripherals
to implement the most common serial
communication protocols. SCI allows the
performance
of
serial
asynchronous
2
communication (UART). I C and SPI peripherals
allow the implementation of synchronous serial
2
protocols. I C peripherals can work both in master
and slave mode. SPI implements Single and Multi
Master modes using 3-wire.
Up to 8 interrupt vectors are available, which allow
synchronization with peripherals and external
devices. Non-Maskable Interrupt and S/W TRAP
are available. All interrupts have configurable
priority levels and are maskable excluding the
Non-Maskable Interrupt, which has fixed top level
priority. Two versatile Port Interrupts are available
for synchronization with external sources.
The ST52F510/F513/F514 also include an on-chip
Power-on-Reset (POR), which provides an internal
chip reset during power up situation and a
Programmable Low Voltage Detector (PLVD),
which causes the ICU to reset if the voltage source
A hardware multiplier and divider, together with a
wide instruction set, allow the implementation of
complex functions by using a single instruction.
Therefore, program memory utilization and
computational speed is optimized.
Fuzzy Logic dedicated structures in ST52F510/
F513/F514 ICU’s can be exploited to model
complex system with high accuracy in a useful and
simple manner.
Fuzzy Expert Systems for overall system
management and Fuzzy Real time Controls can be
designed to increase performance at competitive
costs.
The linguistic approach characterizing Fuzzy Logic
is based on a set of IF-THEN rules, which describe
the control behavior and on Membership Functions
associated with input and output variables.
Up to 340 Membership Functions, with triangular
and trapezoidal shapes, or singleton values are
available to describe fuzzy variables.
The Timer/PWM peripheral allows one to manage
power devices and timing signals, by implementing
different operating modes and high frequency
PWM (Pulse Width Modulation) controls. Input
Capture and Output Compare functions are
available on the Timers.
The Timer has a 16-bit programmable internal
Prescaler and a 16-bit Counter, which can use
internal or external START/STOP signals and
clock.
V
dips below a threshold. Three programmable
DD
thresholds are available, allowing to work with
different supply voltages (from 2.4 to 5.5 V).
In order to optimize energy consumption, two
different power saving modes are available: Wait
mode and Halt mode.
Internal Oscillator at 10 MHz ± 1% is available.
External clock, quartz oscillator or RC oscillator are
also applicable. The device always starts with the
Internal Oscillator, then it reads an Option Byte
where the clock mode to be used is programmed.
Program Memory addressing capability addresses
up to 8 Kbytes of memory location to store both
program instructions and data.
Memory can be locked by the user in order to
prevent external undesired operations.
Operations may be performed on data stored in
RAM, allowing direct combination of new inputs
and feedback data. All RAM bytes are used like
Register File.
An additional RAM bench is added to the Program
Memory addressing space in order to allow the
management of the System/User Stacks and user
data storage.
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