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SRM20V100LLKX7 PDF预览

SRM20V100LLKX7

更新时间: 2024-02-05 20:17:39
品牌 Logo 应用领域
爱普生 - EPSON 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
8页 133K
描述
1M-Bit Static RAM

SRM20V100LLKX7 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP1包装说明:TSOP1, TSSOP32,.56,20
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.92Is Samacsys:N
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:11.8 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-25 °C组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装等效代码:TSSOP32,.56,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.00005 A
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.035 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8 mmBase Number Matches:1

SRM20V100LLKX7 数据手册

 浏览型号SRM20V100LLKX7的Datasheet PDF文件第2页浏览型号SRM20V100LLKX7的Datasheet PDF文件第3页浏览型号SRM20V100LLKX7的Datasheet PDF文件第4页浏览型号SRM20V100LLKX7的Datasheet PDF文件第5页浏览型号SRM20V100LLKX7的Datasheet PDF文件第6页浏览型号SRM20V100LLKX7的Datasheet PDF文件第7页 
PF805-04  
7
SRM20V100LLMX  
7
1M-Bit Static RAM  
Low Supply Voltage  
Wide Temperature Range  
Low Supply Current  
Access Time 70ns (2.7V)  
131,072 Words×8-Bit Asynchronous  
DESCRIPTION  
The SRM20V100LLMX7 is an 131,072 words×8-bit asynchronous, static, random access memory on a monolithic  
CMOS chip. Its very low standby power requirement makes it ideal for applications requiring non-volatile storage  
with back-up batteries. And —25 to 85°C operating temperature range makes it ideal for portable equipment.  
The asynchronous and static nature of the memory requires no external clock or refreshing circuit. Both the  
input and output ports are TTL compatible and 3-state output allows easy expansion of memory capacity.  
FEATURES  
PIN CONFIGURATION  
Wide temperature range ..... –25 to 85°C  
(SOP6)  
Fast Access time ................. SRM20V100LLMX7 70ns (Max.)  
Low supply current .............. standby: 0.6µA (Typ.): LL Version  
0.3µA (Typ.): SL Version  
32 VDD  
31 A15  
30 CS2  
29 WE  
28 A13  
27 A8  
N.C.  
A16  
A14  
A12  
A7  
1
2
3
4
5
A6  
6
operation: 8mA/1MHz (Typ.)  
26 A9  
A5  
7
25 A11  
24 OE  
23 A10  
22 CS1  
21 I/08  
20 I/07  
19 I/06  
18 I/05  
17 I/04  
A4  
8
Completely static ................. No clock required  
Supply voltage..................... 2.7V to 3.6V  
TTL compatible inputs and outputs  
3-state output with wired-OR capability  
Non-volatile storage with back-up batteries  
A3  
9
A2  
10  
11  
12  
A1  
A0  
I/01 13  
I/02 14  
I/03 15  
VSS 16  
Package ...... SRM20V100LLMX7  
SRM20V100LLTX7  
SOP6-32pin (plastic)  
TSOP ( I )-32pin (plastic)  
TSOP ( I )-32pin-R1 (plastic  
Slim-TSOP ( I )-32pin (plastic)  
Slim-TSOP ( I )-32pin-R1 (plastic  
(TSOP/Slim-TSOP)  
A11  
A9  
1
2
3
4
5
6
7
8
9
32 OE  
31 A10  
30 CS1  
29 I/08  
28 I/07  
27 I/06  
26 I/05  
25 I/04  
24 VSS  
23 I/03  
22 I/02  
21 I/01  
20 A0  
19 A1  
18 A2  
17 A3  
SRM20V100LLRX7  
SRM20V100LLKX7  
SRM20V100LLYX7  
)
A8  
A13  
WE  
CS2  
A15  
VDD  
N.C.  
)
SRM20V100LLTX/KX  
A16 10  
A14 11  
A12 12  
BLOCK DIAGRAM  
A7  
A6  
A5  
A4  
13  
14  
15  
16  
A0  
A1  
A2  
(TSOP-R1/Slim-TSOP-R1)  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
A10  
A11  
A12  
A13  
A14  
10  
1024  
Memory Cell Array  
A4  
A5  
A6  
A7  
16  
15  
14  
13  
17 A3  
18 A2  
19 A1  
20 A0  
21 I/01  
22 I/02  
23 I/03  
24 VSS  
25 I/04  
26 I/05  
27 I/06  
28 I/07  
29 I/08  
30 CS1  
31 A10  
32 OE  
1024×128×8  
A12 12  
A14 11  
A16 10  
N.C.  
VDD  
A15  
CS2  
WE  
A13  
A8  
9
8
7
6
5
4
3
2
1
SRM20V100LLRX/YX  
128×8  
7
128  
Column Gate  
A9  
A15  
A16  
A11  
8
CS1  
CS2  
¡PIN DESCRIPTION  
A0 to A16 Address Input  
WE  
OE  
Write Enable  
Output Enable  
OE  
I/O Buffer  
CS1, CS2 Chip Select  
I/O1 to I/O8 Data I/O  
WE  
VDD  
VSS  
N. C.  
Power Supply (2.7V to 3.6V)  
Power Supply (0V)  
No connection  
I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8  

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