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SN75C189ANSRE4 PDF预览

SN75C189ANSRE4

更新时间: 2024-02-13 10:37:56
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德州仪器 - TI /
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QUADRUPLE LOW-POWER LINE RECEIVERS

SN75C189ANSRE4 数据手册

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SN75C189, SN75C189A  
QUADRUPLE LOW-POWER LINE RECEIVERS  
SLLS041G – OCTOBER 1988 – REVISED JANUARY 2000  
D, DB, OR N PACKAGE  
(TOP VIEW)  
Meet or Exceed the Requirements of  
TIA/EIA-232-F and ITU Recommendation  
V.28  
1A  
1 CONT  
1Y  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
CC  
Low Supply Current . . . 420 µA Typ  
Preset On-Chip Input Noise Filter  
Built-in Input Hysteresis  
4A  
4 CONT  
4Y  
2A  
2 CONT  
2Y  
3A  
Response and Threshold Control Inputs  
Push-Pull Outputs  
3 CONT  
3Y  
GND  
8
Functionally Interchangeable and  
Pin-to-Pin Compatible With  
Texas Instruments SN75189/SN75189A and  
Motorola MC1489/MC1489A  
Package Options Include Plastic  
Small-Outline (D) and Shrink Small-Outline  
(DB) Packages, and Standard Plastic (N)  
DIP  
description  
TheSN75C189andSN75C189Aarelow-power, bipolar, quadruple line receivers that are used to interface data  
terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices have been designed  
to conform to TIA/EIA-232-F.  
The SN75C189 has a 0.33-V typical hysteresis, compared with 0.97 V for the SN75C189A. Each receiver has  
provision for adjustment of the overall input threshold levels. This is achieved by choosing external series  
resistors and voltages to provide bias levels for the response-control pins. The output is in the high logic state  
if the input is open circuit or shorted to ground.  
These devices have an on-chip filter that rejects input pulses of less than 1-µs duration. An external capacitor  
can be connected from the control pins to ground to provide further input noise filtering for each receiver.  
The SN75C189 and SN75C189A have been designed using low-power techniques in a bipolar technology. In  
most applications, these receivers interface to single inputs of peripheral devices such as UARTs, ACEs, or  
microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of  
theinputsignals. Ifthisisnotthecase, orforotheruses, itisrecommendedthattheSN75C189andSN75C189A  
outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.  
The SN75C189 and SN75C189A are characterized for operation from 0°C to 70°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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