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SN74HC4040PWE4 PDF预览

SN74HC4040PWE4

更新时间: 2024-11-26 04:27:23
品牌 Logo 应用领域
德州仪器 - TI 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
17页 602K
描述
12-BIT ASYNCHRONOUS BINARY COUNTERS

SN74HC4040PWE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.11计数方向:UP
系列:HC/UHJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF负载/预设输入:NO
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:22000000 Hz
最大I(ol):0.004 A工作模式:ASYNCHRONOUS
湿度敏感等级:1位数:12
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TUBE
峰值回流温度(摄氏度):260电源:2/6 V
传播延迟(tpd):190 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Counters
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:NEGATIVE EDGE
宽度:4.4 mm最小 fmax:25 MHz
Base Number Matches:1

SN74HC4040PWE4 数据手册

 浏览型号SN74HC4040PWE4的Datasheet PDF文件第2页浏览型号SN74HC4040PWE4的Datasheet PDF文件第3页浏览型号SN74HC4040PWE4的Datasheet PDF文件第4页浏览型号SN74HC4040PWE4的Datasheet PDF文件第5页浏览型号SN74HC4040PWE4的Datasheet PDF文件第6页浏览型号SN74HC4040PWE4的Datasheet PDF文件第7页 
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SCLS160D − DECEMBER 1982 − REVISED SEPTEMBER 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
Outputs Can Drive Up To 10 LSTTL Loads  
D
D
D
Typical t = 12 ns  
pd  
4-mA Output Drive at 5 V  
Low Power Consumption, 80-µA Max I  
Low Input Current of 1 µA Max  
CC  
SN54HC4040 . . . FK PACKAGE  
(TOP VIEW)  
SN54HC4040 . . . J OR W PACKAGE  
SN74HC4040 . . . D, DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
Q
Q
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
L
3
2
1
20 19  
18  
Q
Q
Q
Q
F
E
K
J
H
I
Q
Q
Q
Q
4
5
6
7
8
J
E
Q
Q
17  
16  
15  
14  
H
G
G
NC  
NC  
Q
D
C
Q
I
CLR  
Q
D
Q
CLR  
CLK  
Q
C
Q
9 10 11 12 13  
B
GND  
Q
A
NC − No internal connection  
description/ordering information  
The ’HC4040 devices are 12-stage asynchronous binary counters, with the outputs of all stages available  
externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low.  
The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay  
circuits, counter controls, and frequency-dividing circuits.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
PDIP − N  
PACKAGE  
Tube of 25  
Tube of 40  
SN74HC4040N  
SN74HC4040N  
SN74HC4040D  
Reel of 2500  
Reel of 250  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74HC4040DR  
SN74HC4040DT  
SN74HC4040NSR  
SN74HC4040DBR  
SN74HC4040PW  
SN74HC4040PWR  
SN74HC4040PWT  
SNJ54HC4040J  
SNJ54HC4040W  
SNJ54HC4040FK  
SOIC − D  
HC4040  
SOP − NS  
HC4040  
HC4040  
−40°C to 85°C  
SSOP − DB  
Reel of 2000  
Reel of 250  
Tube of 25  
TSSOP − PW  
HC4040  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC4040J  
SNJ54HC4040W  
SNJ54HC4040FK  
Tube of 150  
Tube of 55  
−55°C to 125°C  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
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ꢞꢫ  
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ꢚꢠ  
ꢘꢬ  
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ꢘꢠ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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