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SN74HC193DRE4 PDF预览

SN74HC193DRE4

更新时间: 2024-01-28 00:15:11
品牌 Logo 应用领域
德州仪器 - TI 计数器时钟
页数 文件大小 规格书
17页 483K
描述
4-BIT SYNCHRONOUS UP/DOWN COUNTERS DUAL CLOCK WITH CLEAR

SN74HC193DRE4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.27
其他特性:SEPARATE UP/DOWN CLOCK计数方向:BIDIRECTIONAL
系列:HC/UHJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:17000000 Hz
最大I(ol):0.004 A工作模式:SYNCHRONOUS
湿度敏感等级:1位数:4
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/6 V
传播延迟(tpd):315 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Counters
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:19 MHz

SN74HC193DRE4 数据手册

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SCLS122D − DECEMBER 1982 − REVISED OCTOBER 2003  
description/ordering information (continued)  
The outputs of the four flip-flops are triggered on a low-to-high-level transition of either count (clock) input (UP  
or DOWN). The direction of counting is determined by which count input is pulsed while the other count input  
is high.  
All four counters are fully programmable; that is, each output may be preset to either level by placing a low on  
the load (LOAD) input and entering the desired data at the data inputs. The output changes to agree with the  
data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers  
simply by modifying the count length with the preset inputs.  
A clear (CLR) input has been provided that forces all outputs to the low level when a high level is applied. The  
clear function is independent of the count and LOAD inputs.  
These counters were designed to be cascaded without the need for external circuitry. The borrow (BO) output  
produces a low-level pulse while the count is zero (all outputs low) and DOWN is low. Similarly, the carry (CO)  
output produces a low-level pulse while the count is maximum (9 or 15), and UP is low. The counters then can  
be cascaded easily by feeding BO and CO to DOWN and UP, respectively, of the succeeding counter.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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