SN74ALS679
12-BIT ADDRESS COMPARATOR
SDAS003C – JUNE 1982 – REVISED JANUARY 1995
DW OR N PACKAGE
(TOP VIEW)
• 12-Bit Address Comparator With Enable
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (N) 300-mil DIPs
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A1
A2
A3
A4
A5
A6
A7
A8
A9
V
CC
G
Y
description
P3
P2
P1
P0
A12
A11
A10
This 12-bit address comparator simplifies
addressing of memory boards and/or other
peripheral devices. The four P inputs are normally
hardwired with a preprogrammed address. An
internal decoder determines what input
information applied to the A inputs must be low or
high to cause a low state at the Y output. For
example, a positive-logic bit combination of 0111
GND
(decimal 7) at the Pinput determines that inputs A1 through A7 must be low and that inputs A8 through A12 must
be high to cause the output to go low. Equality of the address applied at the A inputs to the preprogrammed
address is indicated by the output being low.
This device features an enable (G) input. When G is low, the device is enabled. When G is high, the device is
disabled and the output is high, regardless of the A and P inputs.
The SN74ALS679 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUT
Y
G
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
P3 P2 P1 P0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
L
H
H
H
H
L
L
L
H
L
L
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
L
L
L
L
L
†
L
†
L
†
L
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
H
L
L
L
L
L
L
L
All other combinations
Any combination
H
H
†
The three shaded rows of the function table show combinations that would normally not be used in address
comparator applications. The logic symbols above are not valid for these combinations in which P = 12, 13, and 14.
If symbols valid for all combinations are required, starting with the fourth exclusive-OR from the bottom, change P ≥ 9
to P = 9 . . . 11/13 . . . 15, P ≥ 10 to P = 10/11/14/15, and P ≥ 11 to P = 11/15.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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