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SN74ALS679N-10 PDF预览

SN74ALS679N-10

更新时间： 2024-02-12 08:36:11
品牌 Logo 应用领域
德州仪器 - TI 双倍数据速率光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 199K
描述
ALS SERIES, 12-BIT ADDRESS COMPARATOR, INVERTED OUTPUT, PDIP20

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SN74ALS679N-10 技术参数

生命周期：Obsolete包装说明：DIP,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.73其他特性：WITH INHIBIT
系列：ALSJESD-30 代码：R-PDIP-T20
长度：24.325 mm负载电容（CL）：50 pF
逻辑集成电路类型：ADDRESS COMPARATOR位数：12
功能数量：1端子数量：20
最高工作温度：70 °C最低工作温度：
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE最大电源电流（ICC）：28 mA
传播延迟（tpd）：30 ns认证状态：Not Qualified
座面最大高度：5.08 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：TTL
温度等级：COMMERCIAL端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

SN74ALS679N-10 数据手册

 浏览型号SN74ALS679N-10的Datasheet PDF文件第2页浏览型号SN74ALS679N-10的Datasheet PDF文件第3页浏览型号SN74ALS679N-10的Datasheet PDF文件第4页浏览型号SN74ALS679N-10的Datasheet PDF文件第5页浏览型号SN74ALS679N-10的Datasheet PDF文件第6页浏览型号SN74ALS679N-10的Datasheet PDF文件第7页 
SN74ALS679  
12-BIT ADDRESS COMPARATOR  
SDAS003C – JUNE 1982 – REVISED JANUARY 1995  
DW OR N PACKAGE  
(TOP VIEW)  
• 12-Bit Address Comparator With Enable  
• Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (N) 300-mil DIPs  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
V
CC  
G
Y
description  
P3  
P2  
P1  
P0  
A12  
A11  
A10  
This 12-bit address comparator simplifies  
addressing of memory boards and/or other  
peripheral devices. The four P inputs are normally  
hardwired with a preprogrammed address. An  
internal decoder determines what input  
information applied to the A inputs must be low or  
high to cause a low state at the Y output. For  
example, a positive-logic bit combination of 0111  
GND  
(decimal 7) at the Pinput determines that inputs A1 through A7 must be low and that inputs A8 through A12 must  
be high to cause the output to go low. Equality of the address applied at the A inputs to the preprogrammed  
address is indicated by the output being low.  
This device features an enable (G) input. When G is low, the device is enabled. When G is high, the device is  
disabled and the output is high, regardless of the A and P inputs.  
The SN74ALS679 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
G
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
P3 P2 P1 P0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12  
L
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
L
H
H
H
H
L
L
L
H
L
L
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
L
L
L
L
L
†
L
†
L
†
L
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
H
L
L
L
L
L
L
L
All other combinations  
Any combination  
H
H
†
The three shaded rows of the function table show combinations that would normally not be used in address  
comparator applications. The logic symbols above are not valid for these combinations in which P = 12, 13, and 14.  
If symbols valid for all combinations are required, starting with the fourth exclusive-OR from the bottom, change P ≥ 9  
to P = 9 . . . 11/13 . . . 15, P ≥ 10 to P = 10/11/14/15, and P ≥ 11 to P = 11/15.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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