Datasheet > SN74ACTQ573SCX

SN74ACTQ573SCX

更新时间： 2024-10-01 10:52:39

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		光电二极管
页数	文件大小	规格书
10页	212K
描述
Bus Driver, ACT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, PLASTIC, SO-20

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数据手册

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SN74ACTQ573SCX 数据手册

May 1998

74ACQ573 • 74ACTQ573

™

Quiet Series Octal Latch with 3-STATE Outputs

General Description

Features

n I_CCand I_OZreduced by 50%

The ACQ/ACTQ573 is a high-speed octal latch with buffered

common Latch Enable (LE) and buffered common Output

Enable (OE) inputs. The ACQ/ACTQ573 is functionally iden-

tical to the ACQ/ACTQ373 but with inputs and outputs on op-

posite sides of the package. The ACQ/ACTQ utilizes Fair-

n Guaranteed simultaneous switching noise level and

dynamic threshold performance

n Guaranteed pin-to-pin skew AC performance

n Improved latch-up immunity

n Inputs and outputs on opposite sides of package allow

easy interface with microprocessors

n Outputs source/sink 24 mA

™

child’s Quiet Series technology to guarantee quiet output

switching and improved dynamic threshold performance.

™

FACT Quiet Series features GTO output control and un-

dershoot corrector in addition to a split ground bus for supe-

rior performance.

n Faster prop delays than standard AC/ACT573

n 4 kV minimum ESD immunity

Ordering Code:

Order Number

74ACQ573SC

74ACQ573SJ

Package Number

M20B

Package Description

20-Lead (0.300" Wide) Molded Small Outline Package

M20D

20-Lead (0.300" Wide) Molded Shrink Small Outline Package EIAJ

20-Lead Molded Dual-in-Line Package

74ACQ573PC

74ACTQ573SC

74ACTQ573SJ

74ACTQ573PC

74ACTQ573QSC

V20A

M20B

20-Lead (0.300" Wide) Molded Small Outline Package

20-Lead (0.300" Wide) Molded Shrink Small Outline Package EIAJ

20-Lead Molded Dual-in-Line Package

M20D

V20A

MQA20

20-Lead (0.150" Wide) Molded Shrink Small Outline Package

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

Pin Assignment for DIP

QSOP and SOIC

DS010633-1

IEEE/IEC

DS010633-3

Pin Descriptions

Pin Names

Description

D₀–D₇

Data Inputs

Latch Enable Input

3-STATE Output Enable Input

3-STATE Latch Outputs

DS010633-2

O₀–O₇

™

FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation

DS010633

www.fairchildsemi.com

12 3 4 5 6 7...10

中文翻译

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