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SN74AHC00IDRQ1 PDF预览

SN74AHC00IDRQ1

更新时间: 2024-09-28 11:58:43
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
9页 236K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATE

SN74AHC00IDRQ1 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.14系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G14长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.008 A功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:2/5.5 VProp。Delay @ Nom-Sup:8.5 ns
传播延迟(tpd):13 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:AEC-Q100
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
Base Number Matches:1

SN74AHC00IDRQ1 数据手册

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ꢀꢁꢂ ꢃ ꢄ ꢅꢆ ꢇꢇ ꢈꢉ ꢊ  
ꢉ ꢋꢄꢌꢍ ꢋꢎꢏ ꢐ ꢑ ꢈꢒꢁ ꢎꢋꢓ ꢎꢔ ꢀꢒ ꢓ ꢒꢕꢐ ꢈꢁꢄꢁ ꢌ ꢖ ꢄꢓꢐ  
SGDS013B − FEBRUARY 2002 − REVISED APRIL 2008  
D OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
Qualified for Automotive Applications  
Operating Range 2-V to 5.5-V V  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
V
CC  
4B  
4A  
4Y  
3B  
3A  
3Y  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
1Y  
2A  
2B  
− 1000-V Charged-Device Model (C101)  
2Y  
8
GND  
description/ordering information  
The SN74AHC00 device performs the Boolean function Y + A B or Y + A ) B in positive logic.  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
SOIC − D  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
SN74AHC00QDRQ1  
SN74AHC00QPWRQ1  
SN74AHC00IDRQ1  
SN74AHC00IPWRQ1  
AHC00Q  
−40°C to 125°C  
−40°C to 85°C  
TSSOP − PW  
SOIC − D  
HA00Q  
AHC00I  
HA00I  
TSSOP − PW  
For the most current package and ordering information, see the Package Option Addendum at the end of  
this document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
L
H
H
X
logic diagram, each gate (positive logic)  
A
B
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢓꢢ  
Copyright 2008, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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