SN74ABT377ADW

更新时间： 2024-01-21 16:07:54

品牌	Logo	应用领域
德州仪器 - TI		触发器时钟
页数	文件大小	规格书
14页	462K
描述
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE

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数据手册
替代型号

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SN74ABT377ADW 数据手册

SN54ABT377, SN74ABT377

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH CLOCK ENABLE

SCBS156B – FEBRUARY 1991 – REVISED JULY 1994

SN54ABT377 . . . J PACKAGE

SN74ABT377 . . . DB, DW, OR N PACKAGE

(TOP VIEW)

• State-of-the-Art EPIC-ΙΙB BiCMOS Design

Significantly Reduces Power Dissipation

• Latch-Up Performance Exceeds 500 mA

Per JEDEC Standard JESD-17

CLKEN

• Typical V

(Output Ground Bounce)

OLP

< 1 V at V

= 5 V, T = 25°C

• High-Drive Outputs (–32-mA I

64-mA I

)

• Package Options Include Plastic

Small-Outline (DW) and Shrink

13 5D

12 5Q

Small-Outline (DB) Packages, Ceramic

Chip Carriers (FK), and Plastic (N) and

Ceramic (J) DIPs

GND

CLK

description

SN54ABT377 . . . FK PACKAGE

(TOP VIEW)

The ′ABT377 are 8-bit positive-edge-triggered

D-type flip-flops with a clock (CLK) input. They are

particularly suitable for implementing buffer and

storage registers, shift registers, and pattern

generators.

20 19

18 8D

Data (D) input information that meets the setup

time requirements is transferred to the Q outputs

on the positive-going edge of the clock pulse if the

commonclock-enable(CLKEN)inputislow. Clock

triggering occurs at a particular voltage level and

is not directly related to the transition time of the

positive-going pulse. When the buffered clock

(CLK) input is at either the high or low level, the

D input signal has no effect at the output. The

circuits are designed to prevent false clocking by

transitions at CLKEN.

9 10 11 12 13

The SN74ABT377 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count

and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54ABT377 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT377 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

CLKEN CLK

↑

H or L

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

2–1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...14

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SN74ABT377ADW 替代型号

型号	品牌	替代类型	描述	数据表
SN74ABT377ADWE4	TI	完全替代	具有时钟启用功能的八路边沿触发式 D 型触发器 \| DW \| 20 \| -40 to 85
SN74ABT377ADWR	TI	完全替代	Octal Edge-Triggered D-Type Flip-Flops With Clock Enable 20-SOIC -40 to 85
SN74LV273ADW	TI	类似代替	OCTAL D-TYPE FLIP-FLOPS WITH CLEAR

与SN74ABT377ADW相关器件

型号	品牌	获取价格	描述	数据表
SN74ABT377ADWE4	TI	获取价格	具有时钟启用功能的八路边沿触发式 D 型触发器 \| DW \| 20 \| -40 to 85
SN74ABT377ADWR	TI	获取价格	Octal Edge-Triggered D-Type Flip-Flops With Clock Enable 20-SOIC -40 to 85
SN74ABT377ADWRG4	TI	获取价格	ABT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOIC
SN74ABT377AN	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SN74ABT377ANE4	TI	获取价格	ABT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20
SN74ABT377ANSR	TI	获取价格	具有时钟启用功能的八路边沿触发式 D 型触发器 \| NS \| 20 \| -40 to 85
SN74ABT377ANSRE4	TI	获取价格	ABT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOP-
SN74ABT377ANSRG4	TI	获取价格	Octal Edge-Triggered D-Type Flip-Flops With Clock Enable 20-SO -40 to 85
SN74ABT377APW	TI	获取价格	OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE
SN74ABT377APWLE	ROCHESTER	获取价格	D Flip-Flop, ABT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, BICMOS, PDSO

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