SN54AS825A, SN74AS825A
8-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS020B – JUNE 1984 – REVISED AUGUST 1995
SN54AS825A . . . JT PACKAGE
SN74AS825A . . . DW OR NT PACKAGE
(TOP VIEW)
• Functionally Equivalent to AMD’s AM29825
• Improved I Specifications
OH
• Multiple Output Enables Allow Multiuser
Control of the Interface
OE1
OE2
1D
2D
3D
4D
5D
6D
7D
V
CC
1
2
3
4
5
6
7
8
9
24
23 OE3
22 1Q
21 2Q
20 3Q
19 4Q
18 5Q
17 6Q
16 7Q
15 8Q
14 CLKEN
13 CLK
• Outputs Have Undershoot-Protection
Circuitry
• Power-Up High-Impedance State
• Buffered Control Inputs Reduce dc
Loading Effects
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
8D 10
CLR 11
GND 12
description
These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. These devices
are particularly suitable for implementing
multiuser registers, I/O ports, bidirectional bus
drivers, and working registers.
SN54AS825A . . . FK PACKAGE
(TOP VIEW)
4
3
2
1
28 27 26
25
2D
3D
4D
NC
5D
6D
7D
2Q
3Q
4Q
NC
5Q
6Q
7Q
5
With the clock-enable (CLKEN) input low, the
eight D-type edge-triggered flip-flops enter data
on the low-to-high transitions of the clock (CLK)
input. Taking CLKEN high disables the clock
buffer, latching the outputs. These devices have
noninverting data (D) inputs. Taking the clear
(CLR) input low causes the eight Q outputs to go
low independently of the clock.
24
23
22
21
20
19
6
7
8
9
10
11
12 13 14 15 16 17 18
Multiuser buffered output-enable (OE1, OE2, and
OE3) inputs can be used to place the eight outputs
in either a normal logic state (high or low logic
NC – No internal connection
level) or
a high-impedance state. In the
high-impedance state, the outputs neither load
nor drive the bus lines significantly. The high-
impedance state and increased drive provide the
capability to drive bus lines without interface or
pullup components.
The output enables do not affect the internal operation of the flip-flops. Old data can be retained or new data
can be entered while the outputs are in the high-impedance state.
The SN54AS825A is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74AS825A is characterized for operation from 0°C to 70°C.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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